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參數(shù)資料
| 型號： | X9110TV14IZ |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字電位計 |
| 英文描述： | Single Digitally-Controlled (XDCP) Potentiometer |
| 中文描述： | 100K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 1024 POSITIONS, PDSO14 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MO-153AC, TSSOP-14 |
| 文件頁數(shù)： | 5/21頁 |
| 文件大小： | 133K |
| 代理商： | X9110TV14IZ |
X9110 – Preliminary Information
Characteristics subject to change without notice.
5 of 21
REV 1.1.4 11/13/00
www.xicor.com
Figure 1. Detailed Potentiometer Block Diagram
Serial Data Path
From Interface
Circuitry
Register 0
(DR0)
Serial
Bus
Input
Parallel
Bus
Input
Counter
Register
(WCR)
RH
RL
RW
10
10
C
O
U
N
T
E
R
D
E
C
O
D
E
If WCR = 000[HEX] then R
W
= R
L
If
WCR = 3FF[HEX]
then
R
W
=
R
H
Wiper
Register 1
(DR1)
Register 2
(DR2)
Register 3
(DR3)
These switches are controlled by a Wiper Counter
Register (WCR). The 10-bits of the WCR (WCR[9:0])
are decoded to select, and enable, one of 1024
switches.
Wiper Counter Register (WCR)
The X9110 contains a Wiper Counter Register (see
Table 1) for the XDCP potentiometer. The WCR is
equivalent to a serial-in, parallel-out register/counter
with its outputs decoded to select one of 1024 switches
along its resistor array. The contents of the WCR can
be altered in one of three ways: (1) it may be written
directly by the host via the write Wiper Counter
Register instruction (serial load); (2) it may be written
indirectly by transferring the contents of one of four
associated Data Registers via the XFR Data Register;
(3) it is loaded with the contents of its data register zero
(DR0) upon power-up.
The Wiper Counter Register is a volatile register; that
is, its contents are lost when the X9110 is powered-
down. Although the register is automatically loaded
with the value in DR0 upon power-up, this may be
different from the value present at power-down. Power-
up guidelines are recommended to ensure proper
loadings of the DR0 value into the WCR.
Data Registers (DR)
The potentiometer has four 10-bit non-volatile Data
Registers. These can be read or written directly by the
host. Data can also be transferred between any of the
four Data Registers and the Wiper Counter Register.
All operations changing data in one of the Data
Registers is a nonvolatile operation and will take a
maximum of 10ms.
If the application does not require storage of multiple
settings for the potentiometer, the Data Registers can
be used as regular memory locations for system
parameters or user preference data.
DR[9:0] is used to store one of the 1024 wiper position
(0 ~1023). Table 2.
Status Register (SR)
This 1-bit status register is used to store the system
status (see Table 3).
WIP: Write In Progress status bit, read only.
– When WIP=1, indicates that high-voltage write cycle
is in progress.
– When WIP=0, indicates that no high-voltage write
cycle is in progress.
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| X9110TV14Z | 功能描述:IC XDCP SGL 1024TAP 100K 14TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):2 溫度系數(shù):標準值 35 ppm/°C 存儲器類型:易失 接口:6 線串行（芯片選擇，遞增，增/減） 電源電壓:2.6 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
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