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參數(shù)資料
| 型號： | X9110TV14Z-2.7 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字電位計 |
| 英文描述： | Connector assemblies |
| 中文描述： | 100K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 1024 POSITIONS, PDSO14 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MO-153AC, TSSOP-14 |
| 文件頁數(shù)： | 4/21頁 |
| 文件大?。?/td> | 133K |
| 代理商： | X9110TV14Z-2.7 |
X9110 – Preliminary Information
Characteristics subject to change without notice.
4 of 21
REV 1.1.4 11/13/00
www.xicor.com
PIN DESCRIPTIONS
Bus Interface Pins
S
ERIAL
O
UTPUT
(SO)
SO is a serial data output pin. During a read cycle,
data is shifted out on this pin. Data is clocked out on
the falling edge of the serial clock.
S
ERIAL
I
NPUT
(SI)
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the pots and pot
registers are input on this pin. Data is latched by the
rising edge of the serial clock.
S
ERIAL
C
LOCK
(SCK)
The SCK input is used to clock data into and out of the
X9110.
H
OLD
(HOLD)
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause the
serial communication with the controller without resetting
the serial sequence. To pause, HOLD must be brought
LOW while SCK is LOW. To resume communication,
HOLD is brought HIGH, again while SCK is LOW. If the
pause feature is not used, HOLD should be held HIGH at
all times.
D
EVICE
A
DDRESS
(A0)
The address input is used to set the 8-bit slave
address. A match in the slave address serial data
stream A0 must be made with the address input (A0) in
order to initiate communication with the X9110.
C
HIP
S
ELECT
(CS)
When CS is HIGH, the X9110 is deselected and the
SO pin is at high impedance, and (unless an internal
write cycle is underway) the device will be in the
standby state. CS LOW enables the X9110, placing it
in the active power mode. It should be noted that after
a power-up, a HIGH to LOW transition on CS is
required prior to the start of any operation.
H
ARDWARE
W
RITE
P
ROTECT
I
NPUT
(WP)
The WP pin when LOW prevents nonvolatile writes to
the Data Registers.
Potentiometer Pins
R
H
, R
L
The R
connections on a mechanical potentiometer.
H
and R
L
pins are equivalent to the terminal
R
W
The wiper pin are equivalent to the wiper terminal of a
mechanical potentiometer.
Bias Supply Pins
S
YSTEM
S
UPPLY
V
OLTAGE
(V
CC
)
AND
S
UPPLY
G
ROUND
(V
SS
pin
)
The V
is the system ground.
CC
pin is the system supply voltage. The V
SS
A
NALOG
S
UPPLY
V
OLTAGES
(V+
AND
V
-
)
These supplies are the analog voltage supplies for the
potentiometer. The V+ supply is tied to the wiper
switches while the V- supply is used to bias the
switches and the internal P+ substrate of the integrated
circuit. Both of these supplies set the voltage limits of
the potentiometer.
PRINCIPLES OF OPERATION
DEVICE DESCRIPTION
Serial Interface
The X9110 supports the SPI interface hardware
conventions. The device is accessed via the SI input
with data clocked-in on the rising SCK. CS must be
LOW and the HOLD and WP pins must be HIGH
during the entire operation.
The SO and SI pins can be connected together, since
they have three state outputs. This can help to reduce
system pin count.
Array Description
The X9110 is comprised of a resistor array (Figure 1).
The array contains the equivalent of 1023 discrete
resistive segments that are connected in series. The
physical ends of each array are equivalent to the fixed
terminals of a mechanical potentiometer (R
inputs).
H
and R
L
At both ends of each array and between each resistor
segment is a CMOS switch connected to the wiper
(R
W
) output. Within the individual array only one switch
may be turned on at a time.
相關PDF資料 |
PDF描述 |
|---|---|
| X9110 | Single Digitally-Controlled (XDCP) Potentiometer |
| X9110TV14-2.7 | Single Digitally-Controlled (XDCP) Potentiometer |
| X9110TV14I | Single Digitally-Controlled (XDCP) Potentiometer |
| X9110TV14I-2.7 | Single Digitally-Controlled (XDCP) Potentiometer |
| X9110TV14IZ | Single Digitally-Controlled (XDCP) Potentiometer |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| X9110TV14ZT1 | 功能描述:IC XDCP 1024-TAP 100K 14-TSSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 接片:256 電阻（歐姆）:100k 電路數(shù):2 溫度系數(shù):標準值 35 ppm/°C 存儲器類型:易失 接口:6 線串行（芯片選擇，遞增，增/減） 電源電壓:2.6 V ~ 5.5 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:14-TSSOP 包裝:帶卷 (TR) |
| X9111 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Single Supply/Low Power/1024-Tap/SPI Bus |
| X9111_06 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Single Digitally-Controlled (XDCP⑩) Potentiometer |
| X9111TB15 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Single Digitally-Controlled Potentiometer |
| X9111TB15-2.7 | 制造商:XICOR 制造商全稱:Xicor Inc. 功能描述:Single Digitally-Controlled Potentiometer |
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