參數(shù)資料
型號(hào): X9111TV14I-2.7
廠商: INTERSIL CORP
元件分類(lèi): 數(shù)字電位計(jì)
英文描述: Single Supply/Low Power/1024-Tap/SPI Bus
中文描述: 100K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 1024 POSITIONS, PDSO14
封裝: 4.40 MM, PLASTIC, TSSOP-14
文件頁(yè)數(shù): 1/21頁(yè)
文件大?。?/td> 156K
代理商: X9111TV14I-2.7
REV 1.1.15 5/9/03
Characteristics subject to change without notice.
1 of 21
www.xicor.com
X9111
Single Digitally-Controlled (XDCP
) Potentiometer
FEATURES
1024 Resistor Taps – 10-Bit Resolution
SPI Serial Interface for write, read, and transfer
operations of the potentiometer
Wiper Resistance, 40
Typical @ 5V
Four Non-Volatile Data Registers
Non-Volatile Storage of Multiple Wiper Positions
Power On Recall. Loads Saved Wiper Position on
Power Up.
Standby Current < 3
μ
A Max
V
CC
: 2.7V to 5.5V Operation
100K
End to End Resistance
100 yr. Data Retention
Endurance: 100, 000 Data Changes Per Bit Per
Register
14-Lead TSSOP, 15-Lead CSP (Chip Scale
Packaging)
Low Power CMOS
Single Supply version of the X9110
DESCRIPTION
The X9111 integrates a single digitally controlled
potentiometer (XDCP) on a monolithic CMOS
integrated circuit.
The digital controlled potentiometer is implemented
using 1023 resistive elements in a series array.
Between each element are tap points connected to the
wiper terminal through switches. The position of the
wiper on the array is controlled by the user through the
SPI bus interface. The potentiometer has associated
with it a volatile Wiper Counter Register (WCR) and
four non-volatile Data Registers that can be directly
written to and read by the user. The contents of the
WCR controls the position of the wiper on the resistor
array though the switches. Powerup recalls the
contents of the default data register (DR0) to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
Single Supply / Low Power / 1024-tap / SPI bus
A
PPLICATION
N
OTES
AND
D
EVELOPMENT
S
YSTEM
A V A I L A B L E
AN99 AN115 AN124 AN133 AN134 AN135
FUNCTIONAL DIAGRAM
R
H
R
L
Bus
R
W
Interface &
Control
POT
V
CC
V
SS
SPI
Bus
Address
Data
Status
Write
Read
Transfer
Wiper
1024-taps
NC
100K
Power On Recall
Wiper Counter
Register (WCR)
Data Registers
(DR0-DR3)
Control
Interface
Preliminary Information
相關(guān)PDF資料
PDF描述
X9111 Single Supply/Low Power/1024-Tap/SPI Bus
X9119 CLAMP
X9119TB15 CLAMP
X9119TB15I-2.7 CLAMP
X9119TV14 Single Supply/Low Power/1024-Tap/2-Wire Bus
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