7. t
參數(shù)資料
型號: X9119TV14I-2.7
廠商: Intersil
文件頁數(shù): 3/17頁
文件大?。?/td> 0K
描述: IC DCP 100K 1024TP 14TSSOP
標準包裝: 95
系列: XDCP™
接片: 1024
電阻(歐姆): 100k
電路數(shù): 1
溫度系數(shù): 標準值 ±300 ppm/°C
存儲器類型: 非易失
接口: I²C(設(shè)備位址)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 管件
11
FN8162.4
July 9, 2008
Capacitance
NOTES:
6. Limits should be considered typical and are not production tested.
7. tPUR and tPUW are the delays required from the time the (last) power supply (Vcc-) is stable until the specific instruction can be issued. These
parameters are not 100% tested.
8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
Operating Specifications (Over the recommended operating conditions unless otherwise specified.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNITS
VCC supply current
(active)
ICC1
fSCL = 400kHz; VCC = +5.5V;
SDA = Open; (for 2-wire, Active, Read and
Volatile Write States only)
3mA
VCC supply current
(nonvolatile write)
ICC2
fSCL = 400kHz; VCC = +5.5V;
SDA = Open; (for 2-wire, Active,
Non-volatile Write State only)
5mA
VCC current (standby)
ISB
VCC = +5.5V; VIN = VSS or VCC;
SDA = VCC;
(for 2-wire, Standby State only)
3A
Input leakage current
ILI
VIN = VSS to VCC
10
A
Output leakage
current
ILO
VOUT = VSS to VCC
10
A
Input HIGH voltage
VIH
VCC x 0.7
VCC + 1
V
Input LOW voltage
VIL
-1
VCC x 0.3
V
Output LOW voltage
VOL
IOL = 3mA
0.4
V
Output HIGH voltage
VOH
Endurance and Data Retention
PARAMETER
MIN
UNITS
Minimum Endurance
100,000
Data changes per bit per register
Data Retention
100
years
TEST
SYMBOL
MAX
UNITS
TEST CONDITIONS
Input/Output capacitance (SI)
CIN/OUT (Note 6)
8
pF
VOUT = 0V
Input capacitance (SCL, WP, A1 and A0)
CIN (Note 6)
6
pF
VIN = 0V
Power-Up Timing
PARAMETER
SYMBOL
MIN
MAX
UNITS
VCC Power-up Rate
tr VCC (Note 6)
0.2
50
V/ms
Power-up to Initiation of read operation
tPUR (Note 7)
1
ms
Power-up to Initiation of write operation
tPUW (Note 7)
50
ms
AC Test Conditions
Input Pulse Levels
VCC x 0.1 to VCC x 0.9
Input Rise and Fall Times
10ns
Input and Output Timing Level
VCC x 0.5
X9119
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