參數(shù)資料
型號: X9119TV14IZ-2.7T1
廠商: Intersil
文件頁數(shù): 11/17頁
文件大小: 0K
描述: IC POT DGTL 100K OHM 14-TSSOP
標(biāo)準(zhǔn)包裝: 1
系列: XDCP™
接片: 1024
電阻(歐姆): 100k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 ±300 ppm/°C
存儲器類型: 非易失
接口: I²C(設(shè)備位址)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: X9119TV14IZ-2.7T1DKR
3
FN8162.4
July 9, 2008
Applications
Circuit Level
Vary the gain of a voltage amplifier
Provide programmable DC reference voltages for
comparators and detectors
Control the volume in audio circuits
Trim out the offset voltage error in a voltage amplifier
circuit
Set the output voltage of a voltage regulator
Trim the resistance in Wheatstone bridge circuits
Control the gain, characteristic frequency and Q-factor in
filter circuits
Set the scale factor and zero point in sensor signal
conditioning circuits
Vary the frequency and duty cycle of timer ICs
Vary the DC biasing of a pin diode attenuator in RF circuits
Provide a control variable (I, V, or R) in feedback circuits
System Level
Adjust the contrast in LCD displays
Control the power level of LED transmitters in
communication systems
Set and regulate the DC biasing point in an RF power
amplifier in wireless systems
Control the gain in audio and home entertainment systems
Provide the variable DC bias for tuners in RF wireless
systems
Set the operating points in temperature control systems
Control the operating point for sensors in industrial
systems
Trim offset and gain errors in artificial intelligent
systems
Pinout
X9119
(14 LD TSSOP)
TOP VIEW
Bus Interface Pins
SERIAL DATA INPUT/OUTPUT (SDA)
The SDA is a bidirectional serial data input/output pin for a
2-wire slave device and is used to transfer data into and out
of the device. It receives device address, opcode, wiper
register address and data sent from an 2-wire master at the
rising edge of the serial clock SCL, and it shifts out data after
each falling edge of the serial clock SCL.
It is an open drain output and may be wire-ORed with any
number of open drain or open collector outputs. An open
drain output requires the use of a pull-up resistor. For
selecting typical values, refer to the guidelines for calculating
typical values on the bus pull-up resistors graph.
SERIAL CLOCK (SCL)
This input is used by 2-wire master to supply 2-wire serial
clock to the X9119.
DEVICE ADDRESS (A2–A0)
The Address inputs are used to set the least significant 3 bits
of the 8-bit slave address. A match in the slave address
serial data stream must be made with the Address input in
order to initiate communication with the X9119. A maximum
of 8 devices may occupy the 2-wire serial bus.
HARDWARE WRITE PROTECT INPUT (WP)
The WP pin when LOW prevents nonvolatile writes to the
Data Registers.
Potentiometer Pins
RH, RL
The RH and RL pins are equivalent to the terminal
connections on a mechanical potentiometer.
VCC
RL
VSS
1
2
3
4
5
6
7
8
14
13
12
11
10
9
NC
RW
A2
A1
RH
A0
NC
SDA
NC
SCL
WP
Pin Assignments
PIN
NUMBER
PIN NAME
FUNCTION
1, 3, 10
NC
No Connect
2
A0
Device Address for 2-wire bus
4
A2
Device Address for 2-wire bus
5
SCL
Serial Clock for 2-wire bus
6
SDA
Serial Data Input/Output for 2-wire bus
7VSS
System Ground
8WP
Hardware Write Protect
9
A1
Device Address for 2-wire bus
11
RW
Wiper terminal of the Potentiometer
12
RH
High terminal of the Potentiometer
13
RL
Low terminal of the Potentiometer
14
VCC
System Supply Voltage
X9119
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