參數(shù)資料
型號(hào): X9221YS
元件分類: 數(shù)字電位計(jì)
英文描述: Dual E2POT⑩ Nonvolatile Digital Potentiometer
中文描述: 雙E2POT⑩非易失數(shù)字電位器
文件頁(yè)數(shù): 2/14頁(yè)
文件大?。?/td> 65K
代理商: X9221YS
2
X9221
PIN DESCRIPTIONS
Host Interface Pins
Serial Clock (SCL)
The SCL input is used to clock data into and out of the
X9221.
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into and
out of the device. It is an open drain output and may be
wire-ORed with any number of open drain or open
collector outputs. An open drain output requires the use
of a pull-up resistor. For selecting typical values, refer
to the guidelines for calculating typical values on the
bus pull-up resistors graph.
Address
The Address inputs are used to set the least significant
4 bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
Address input in order to initiate communication with the
X9221
Potentiometer Pins
V
H
(V
H0
– V
H1
), V
L
(V
L0
– V
L1
)
The VH and VL inputs are equivalent to the terminal
connections on either end of a mechanical potentiom-
eter.
V
W
(V
W0
– V
W1
)
The wiper outputs are equivalent to the wiper output of
a mechanical potentiometer.
PIN CONFIGURATION
PIN NAMES
Symbol
Description
SCL
SDA
A0–A3
V
H0
–V
H1,
V
L0
–V
L1
Serial Clock
Serial Data
Address
Potentiometers
(terminal equivalent)
Potentiometers
(wiper equivalent)
Reserved (Do not connect)
V
W0
–V
W1
RES
3079 PGM T01
PRINCIPLES OF OPERATION
The X9221 is a highly integrated microcircuit incorporat-
ing two resistor arrays, their associated registers and
counters and the serial interface logic providing direct
communication between the host and the E
2
POT poten-
tiometers.
Serial Interface
The X9221 supports a bidirectional bus oriented proto-
col. The protocol defines any device that sends data
onto the bus as a transmitter and the receiving device as
the receiver. The device controlling the transfer is a
master and the device being controlled is the slave. The
master will always initiate data transfers and provide the
clock for both transmit and receive operations. There-
fore, the X9221 will be considered a slave device in all
applications.
Clock and Data Conventions
Data states on the SDA line can change only during SCL
LOW periods (t
LOW
). SDA state changes during SCL HIGH
are reserved for indicating start and stop conditions.
Start Condition
All commands to the X9221 are preceded by the start
condition, which is a HIGH to LOW transition of SDA
while SCL is HIGH (t
HIGH
). The X9221 continuously
monitors the SDA and SCL lines for the start condition
and will not respond to any command until this condition
is met.
Stop Condition
All communications must be terminated by a stop con-
dition, which is a LOW to HIGH transition of SDA while
SCL is HIGH.
VW0
VL0
VH0
A0
A2
VW1
VL1
VH1
SDA
VSS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
RES
RES
RES
A1
A3
SCL
RES
RES
RES
DIP/SOIC
X9221
3079 ILL F01.1
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