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參數(shù)資料
| 型號(hào)： | X9221YSM |
| 元件分類： | 數(shù)字電位計(jì) |
| 英文描述： | Dual E2POT⑩ Nonvolatile Digital Potentiometer |
| 中文描述： | 雙E2POT⑩非易失數(shù)字電位器 |
| 文件頁數(shù)： | 4/14頁 |
| 文件大?。?/td> | 65K |
| 代理商： | X9221YSM |
4
X9221
Instruction Structure
The next byte sent to the X9221 contains the instruction
and register pointer information. The four most signifi-
cant bits are the instruction. The next four bits point to
one of two pots and when applicable they point to one of
four associated registers. The format is shown below in
Figure 2.
current wiper position to a data register is a write to
nonvolatile memory and takes a minimum of t
WR
to
complete. The transfer can occur between either poten-
tiometer and their associated registers or it may occur
between both of the potentiometers and one of their
associated registers.
Four instructions require a three-byte sequence to
complete. These instructions transfer data between the
host and the X9221; either between the host and one of
the data registers or directly between the host and the
WCR. These instructions are: Read WCR, read the
current wiper position of the selected pot; Write WCR,
change current wiper position of the selected pot; Read
Data Register, read the contents of the selected non-
volatile register; Write Data Register, write a new value
to the selected data register. The sequence of opera-
tions is shown in Figure 4.
The Increment/Decrement command is different from
the other commands. Once the command is issued and
the X9221 has responded with an acknowledge, the
master can clock the selected wiper up and/or down in
one segment steps; thereby, providing a fine tuning
capability to the host. For each SCL clock pulse (t
HIGH
)
while SDA is HIGH, the selected wiper will move one
resistor segment towards the V
H
terminal. Similarly, for
each SCL clock pulse while SDA is LOW, the selected
wiper will move one resistor segment towards the V
L
terminal. A detailed illustration of the sequence and
timing for this operation are shown in Figures 5 and 6
respectively.
Figure 2. Instruction Byte Format
The four high order bits define the instruction. The sixth
bit (P0) selects which one of the two potentiometers is
to be affected by the instruction. The last two bits (R1
and R0) select one of the four registers that is to be acted
upon when a register oriented instruction is issued.
Four of the nine instructions end with the transmission of
the instruction byte. The basic sequence is illustrated in
Figure 3. These two-byte instructions exchange data
between the WCR and one of the data registers. A
transfer from a data register to a WCR is essentially a
write to a static RAM. The response of the wiper to this
action will be delayed t
STPWV
. A transfer from WCR’s
Figure 3. Two-Byte Command Sequence
I1
I2
I3
I0
0
P0
R1
R0
POTENTIOMETER
SELECT
REGISTER
SELECT
INSTRUCTIONS
3079 ILL F09.1
S
T
A
R
T
0
1
0
1
A3
A2
A1
A0
A
C
K
I3
I2
I1
I0
0
P0
R1 R0
A
C
K
SCL
SDA
S
T
O
P
3079 ILL F10
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X9221USM | Dual E2POT⑩ Nonvolatile Digital Potentiometer |
| X9221USI | Dual E2POT⑩ Nonvolatile Digital Potentiometer |
| X9221WP | Dual E2POT⑩ Nonvolatile Digital Potentiometer |
| X9221WPM | Dual E2POT⑩ Nonvolatile Digital Potentiometer |
| X9221WS | Dual E2POT⑩ Nonvolatile Digital Potentiometer |
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參數(shù)描述 |
|---|---|
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| X9241AMP | 功能描述:IC XDCP QUAD 2/10/10/50K 20-D RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 標(biāo)準(zhǔn)包裝:2,500 系列:XDCP™ 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 ±300 ppm/°C 存儲(chǔ)器類型:非易失 接口:I²C（設(shè)備位址） 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
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