參數(shù)資料
型號(hào): X9241AWP
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計(jì)
英文描述: BRIDGE RECTIFIER, CONTROLLED; Thyristor/Triac type:Thyristor/Diode Module; Voltage, Vrrm:800V; Current, It av:46A; Current, Itsm:470A; Voltage, Vgt:2.3V; Current, Igt:150mA; Case style:SEMIPOINT 2; Temperature, current:85(degree C); RoHS Compliant: Yes
中文描述: QUAD 10K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDIP20
封裝: PLASTIC, DIP-20
文件頁(yè)數(shù): 13/18頁(yè)
文件大?。?/td> 364K
代理商: X9241AWP
X9241A
Characteristics subject to change without notice.
13 of 18
REV 1.1.13 12/09/02
www.xicor.com
A.C. CHARACTERISTICS
(Over recommended operating conditions unless otherwise stated.)
Figure 10. Input Bus Timing
Figure 11. Output Bus Timing
Symbol
f
SCL
(5)
t
LOW
(5)
t
HIGH
(5)
t
R
(5)
t
F
(5)
T
i
(5)(9)
t
SU:STA
(5)
t
HD:STA
(5)
t
SU:DAT
(5)
t
HD:DAT
(5)
t
AA
(5)
t
DH
(5)
t
SU:STO
(5)
t
BUF
(5)
t
WR
(5)
t
STPWV
(5)
t
CLWV
(5)
t
R
V
CC
Parameter
Limits
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
μs
μs
mV/μs
Reference
Figure
10
10
10
10
10
10
10 & 12
10 & 12
10
10
11
11
10 & 12
10
13
13
6
Min.
0
4700
4000
Max.
100
SCL clock frequency
Clock LOW period
Clock HIGH period
SCL and SDA rise time
SCL and SDA fall time
Noise suppression time constant (glitch filter)
Start condition setup time (for a repeated start condition)
Start condition hold time
Data in setup time
Data in hold time
SCL LOW to SDA data out valid
Data out hold time
Stop condition setup time
Bus free time prior to new transmission
Write cycle time (nonvolatile write operation)
Wiper response time from stop generation
Wiper response from SCL LOW
V
CC
power-up rate
1000
300
20
4700
4000
250
0
3500
50
4700
4700
10
500
1000
50
0.2
t
HIGH
t
SU:STA
t
HD:STA
t
HD:DAT
t
SU:DAT
t
LOW
t
F
t
SU:STO
t
R
t
BUF
SCL
SDA
(Data in)
t
AA
t
DH
SCL
SDA
SDA
OUT
(ACK)
SDA
OUT
SDA
OUT
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