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參數(shù)資料
| 型號： | X9251TV24I |
| 元件分類： | 數(shù)字電位計(jì) |
| 英文描述： | Quad Digitally-Controlled (XDCP) Potentiometer |
| 中文描述： | 四數(shù)字控制（數(shù)字電位器）電位 |
| 文件頁數(shù)： | 7/25頁 |
| 文件大小： | 549K |
| 代理商： | X9251TV24I |
X9251
Characteristics subject to change without notice.
7 of 25
REV 1.3.3 2/10/04
www.xicor.com
Wiper Counter Register (WCR)
The X9251 contains four Wiper Counter Registers, one
for each potentiometer. The Wiper Counter Register
can be envisioned as a 8-bit parallel and serial load
counter with its outputs decoded to select one of 256
wiper positions along its resistor array. The contents of
the WCR can be altered in four ways: it may be written
directly by the host via the Write Wiper Counter
Register instruction (serial load); it may be written
indirectly by transferring the contents of one of four
associated data registers via the XFR Data Register
instruction (parallel load); it can be modified one step
at a time by the Increment/Decrement instruction (see
Instruction section for more details). Finally, it is loaded
with the contents of its Data Register zero (DR#0)
upon power-up. (See Figure 1.)
The wiper counter register is a volatile register; that is,
its contents are lost when the X9251 is powered-down.
Although the register is automatically loaded with the
value in DR#0 upon power-up, this may be different
from the value present at power-down. Power-up
guidelines are recommended to ensure proper
loadings of the DR#0 value into the WCR#.
Data Registers (DR)
Each of the four DCPs has four 8-bit non-volatile Data
Registers. These can be read or written directly by the
host. Data can also be transferred between any of the
four Data Registers and the associated Wiper Counter
Register. All operations changing data in one of the
Data Registers is a non-volatile operation and takes a
maximum of 10ms.
If the application does not require storage of multiple
settings for the potentiometer, the Data Registers can
be used as regular memory locations for system
parameters or user preference data.
Bits [7:0] are used to store one of the 256 wiper
positions or data (0~255).
Status Register (SR)
This 1-bit Status Register is used to store the system
status.
WIP: Write In Progress status bit, read only.
– When WIP=1, indicates that high-voltage write cycle
is in progress.
– When WIP=0, indicates that no high-voltage write
cycle is in progress.
Table 1. Wiper counter Register, WCR (8-bit), WCR[7:0]:
Used to store the current wiper position (Volatile).
Table 2. Data Register, DR (8-bit), DR[7:0]:
Used to store wiper positions or data (Non-volatile).
WCR7
(MSB)
WCR6
WCR5
WCR4
WCR3
WCR2
WCR1
WCR0
(LSB)
Bit 7
(MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
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| X9251TV24I-2.7 | 功能描述:IC XDCP QUAD 256TAP 100K 24TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 標(biāo)準(zhǔn)包裝:2,500 系列:XDCP™ 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 ±300 ppm/°C 存儲器類型:非易失 接口:I²C（設(shè)備位址） 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
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