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參數(shù)資料
| 型號(hào)： | X9251UV24Z-2.7 |
| 廠商： | Intersil |
| 文件頁(yè)數(shù)： | 15/20頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC XDCP QUAD 256TAP 50K 24-TSSOP |
| 產(chǎn)品培訓(xùn)模塊： | Solutions for Industrial Control Applications |
| 標(biāo)準(zhǔn)包裝： | 62 |
| 系列： | XDCP™ |
| 接片： | 256 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 4 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 ±300 ppm/°C |
| 存儲(chǔ)器類型： | 非易失 |
| 接口： | 6 線 SPI（芯片選擇，設(shè)備位址） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-TSSOP |
| 包裝： | 管件 |
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4
FN8166.5
April 13, 2007
Pin Descriptions
Bus Interface Pins
SERIAL OUTPUT (SO)
SO is a serial data output pin. During a read cycle, data is
shifted out on this pin. Data is clocked out by the falling edge
of the serial clock.
SERIAL INPUT (SI)
SI is the serial data input pin. All opcodes, byte addresses
and data to be written to the device registers are input on
this pin. Data is latched by the rising edge of the serial clock.
SERIAL CLOCK (SCK)
The SCK input is used to clock data into and out of the
X9251.
HOLD (HOLD)
HOLD is used in conjunction with the CS pin to select the
device. Once the part is selected and a serial sequence is
underway, HOLD may be used to pause the serial
communication with the controller without resetting the serial
sequence. To pause, HOLD must be brought LOW while
SCK is LOW. To resume communication, HOLD is brought
HIGH, again while SCK is LOW. If the pause feature is not
used, HOLD should be held HIGH at all times.
DEVICE ADDRESS (A1 AND A0)
The address inputs are used to set the two least significant
bits of the slave address. A match in the slave address serial
data stream must be made with the address input in order to
initiate communication with the X9251. Device pins A1 and
A0 must be tied to a logic level which specifies the internal
CHIP SELECT (CS)
When CS is HIGH, the X9251 is deselected and the SO pin
is at high impedance, and (unless an internal write cycle is
underway) the device is in the standby state. CS LOW
enables the X9251, placing it in the active power mode. It
should be noted that after a power-up, a HIGH to LOW
transition on CS is required prior to the start of any
operation.
Potentiometer Pins
RH, RL
The RH and RL pins are equivalent to the terminal
connections on a mechanical potentiometer. Since there are
4 potentiometers, there are 4 sets of RH and RL such that
RH0 and RL0 are the terminals of DCP0 and so on.
RW
The wiper pin are equivalent to the wiper terminal of a
mechanical potentiometer. Since there are 4 potentiometers,
there are 4 sets of RW such that RW0 is the terminals of
DCP0 and so on.
Supply Pins
SYSTEM SUPPLY VOLTAGE (VCC) AND SUPPLY
GROUND (VSS)
The VCC pin is the system supply voltage. The VSS pin is
the system ground.
Other Pins
NO CONNECT
No connect pins should be left floating. This pins are
used for Intersil manufacturing and testing purposes.
HARDWARE WRITE PROTECT INPUT (WP)
The WP pin when LOW prevents non-volatile writes to the
Data Registers.
Principles of Operation
The X9251 is an integrated circuit incorporating four DCPs
and their associated registers and counters, and a serial
interface providing direct communication between a host
and the potentiometers.
DCP Description
Each DCP is implemented with a combination of resistor
elements and CMOS switches. The physical ends of each
DCP are equivalent to the fixed terminals of a mechanical
potentiometer (RH and RL pins). The RW pin is an
intermediate node, equivalent to the wiper terminal of a
mechanical potentiometer.
The position of the wiper terminal within the DCP is
controlled by an 8-bit volatile Wiper Counter Register
(WCR).
X9251
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X9252 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power + Quad 256-Tap + 2-Wire Bus + Up/Down Interface |
| X9252TS24I-2.7 | 功能描述:IC XDCP QUAD 256TAP 100K 24-SOIC RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 標(biāo)準(zhǔn)包裝:2,500 系列:XDCP™ 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 ±300 ppm/°C 存儲(chǔ)器類型:非易失 接口:I²C（設(shè)備位址） 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
| X9252TS24IZ-2.7 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Low Power + Quad 256-Tap + 2-Wire Bus + Up/Down Interface |
| X9252TV24-2.7 | 功能描述:IC DCP QUAD 100K 256TAP 24-TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 標(biāo)準(zhǔn)包裝:2,500 系列:XDCP™ 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 ±300 ppm/°C 存儲(chǔ)器類型:非易失 接口:I²C（設(shè)備位址） 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
| X9252TV24I-2.7 | 功能描述:IC DCP QUAD 100K 256TAP 24-TSSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 標(biāo)準(zhǔn)包裝:2,500 系列:XDCP™ 接片:256 電阻（歐姆）:100k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 ±300 ppm/°C 存儲(chǔ)器類型:非易失 接口:I²C（設(shè)備位址） 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:14-TSSOP 包裝:帶卷 (TR) |
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