參數(shù)資料
型號(hào): X9258TS24
元件分類: 數(shù)字電位計(jì)
英文描述: Quad Digital Controlled Potentiometers (XDCP)
中文描述: 四數(shù)字(數(shù)字電位器控制電位器)
文件頁(yè)數(shù): 13/22頁(yè)
文件大小: 413K
代理商: X9258TS24
X9258
Characteristics subject to change without notice.
13 of 22
REV 1.1.7 2/4/03
www.xicor.com
D.C. OPERATING CHARACTERISTICS
(Over the recommended operating conditions unless otherwise specified.)
Notes:
(1) Absolute linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used
as a potentiometer.
(2) Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potenti-
ometer. It is a measure of the error in step size.
(3) MI = RTOT/255 or (V
H
/R
H
—V
L
/R
L
)/255, single pot
(4) Max. = all four arrays cascaded together, Typical = individual array resolutions.
ENDURANCE AND DATA RETENTION
CAPACITANCE
POWER-UP TIMING
POWER UP AND DOWN REQUIREMENT
The are no restrictions on the sequencing of the bias supplies V
CC
, V+, and V- provided that all three supplies
reach their final values within 1msec of each other. At all times, the voltages on the potentiometer pins must be less
than V+ and more than V-. The recall of the wiper position from nonvolatile memory is not in effect until all supplies
reach their final value. The V
CC
ramp rate spec is always in effect.
Notes:
(5) This parameter is periodically sampled and not 100% tested.
(6) t
PUR
and t
PUW
are the delays required from the time the third (last) power supply (V
CC
, V+ or V-) is stable until the specific
instruction can be issued. These parameters are periodically sampled and not 100% tested.
(7) Sample tested only.
Symbol
I
CC1
Parameter
Limits
Typ.
1
Test Conditions
f
SCL
= 400kHz, SDA = Open,
Other Inputs = V
SS
f
SCL
= 400kHz, SDA = Open,
Other Inputs = V
SS
SCL = SDA = V
CC
, Addr. = V
SS
V
IN
= V
SS
to V
CC
V
OUT
= V
SS
to V
CC
Min.
Max.
Unit
mA
V
CC
supply current (Non-
volatile Write)
V
CC
supply current (move
wiper, write, read)
V
CC
current (standby)
Input leakage current
Output leakage current
Input HIGH voltage
Input LOW voltage
Output LOW voltage
I
CC2
100
μA
I
SB
I
LI
I
LO
V
IH
V
IL
V
OL
5
10
10
μA
μA
μA
V
V
V
V
CC
x 0.7
–0.5
V
CC
+ 0.1
V
CC
x 0.3
0.4
I
OL
= 3mA
Parameter
Minimum endurance
Data retention
Min.
100,000
100
Unit
Data changes per bit per register
years
Symbol
C
I/O
(5)
C
IN
(5)
Test
Max.
8
6
Unit
pF
pF
Test Conditions
V
I/O
= 0V
V
IN
= 0V
Input/output capacitance (SDA)
Input capacitance (A0, A1, A2, A3, and SCL)
Symbol
t
PUR
(6)
t
PUW
(6)
t
R
V
CC
(7)
Parameter
Min.
Max.
1
5
50
Unit
ms
ms
V/msec
Power-up to initiation of read operation
Power-up to initiation of write operation
V
CC
Power up ramp
0.2
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