7. tPUR and t
參數(shù)資料
型號(hào): X9259TS24IZ-2.7T1
廠(chǎng)商: Intersil
文件頁(yè)數(shù): 6/21頁(yè)
文件大?。?/td> 0K
描述: IC XDCP QUAD 256TAP 100K 24-SOIC
標(biāo)準(zhǔn)包裝: 1,000
系列: XDCP™
接片: 256
電阻(歐姆): 100k
電路數(shù): 4
溫度系數(shù): 標(biāo)準(zhǔn)值 ±300 ppm/°C
存儲(chǔ)器類(lèi)型: 非易失
接口: I²C(設(shè)備位址)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 24-SOIC
包裝: 帶卷 (TR)
14
FN8169.5
April 13, 2007
NOTES:
6. This parameter is not 100% tested
7. tPUR and tPUW are the delays required from the time the power supply (VCC) is stable until the specific instruction can be issued. These
parameters are periodically sampled and not 100% tested.
DC Electrical Specifications
Over the recommended operating conditions unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
MIN
TYP
MAX
UNITS
ICC1
VCC supply current
(active)
fSCL = 400kHz; VCC = +6V;
SDA = Open; (for 2-Wire, Active, Read and
Volatile Write States only)
3mA
ICC2
VCC supply current
(non-volatile write)
fSCL = 400kHz; VCC = +6V;
SDA = Open; (for 2-Wire, Active,
Non-volatile Write State only)
5mA
ISB
VCC current (standby)
VCC = +6V; VIN = VSS or VCC; SDA = VCC;
(for 2-Wire, Standby State only)
5
μA
ILI
Input leakage current
VIN = VSS to VCC
10
μA
ILO
Output leakage current
VOUT = VSS to VCC
10
μA
VIH
Input HIGH voltage
VCC x 0.7
V
VIL
Input LOW voltage
VCC x 0.3
V
VOL
Output LOW voltage
IOL = 3mA
0.4
V
VOH
Output HIGH voltage
IOH = -1mA, VCC ≥ +3V
VCC - 0.8
V
VOH
Output HIGH voltage
IOH = -0.4mA, VCC ≤ +3V
VCC - 0.4
V
Endurance and Data Retention
PARAMETER
MIN
UNITS
Minimum endurance
100,000
Data changes per bit per register
Data retention
100
years
Capacitance
SYMBOL
TEST
MAX
UNITS
TEST CONDITIONS
CIN/OUT (Note 6)
Input / Output capacitance (SDA)
8
pF
VOUT = 0V
CIN (Note 6)
Input capacitance (SCL, WP, A2, A1 and A0)
6
pF
VIN = 0V
Power-up Timing
SYMBOL
PARAMETER
MIN
MAX
UNITS
tr VCC (Note 6)
VCC Power-up rate
0.2
V/ms
tPUR (Note 7)
Power-up to initiation of read operation
1
ms
tPUW (Note 7)
Power-up to initiation of write operation
50
ms
A.C. Test Conditions
Input Pulse Levels
VCC x 0.1 to VCC x 0.9
Input rise and fall times
10ns
Input and output timing level
VCC x 0.5
X9259
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