參數(shù)資料
型號(hào): X9259UV24IZ-2.7
廠商: Intersil
文件頁(yè)數(shù): 21/21頁(yè)
文件大?。?/td> 0K
描述: IC XDCP QUAD 256TAP 50K 24-TSSOP
標(biāo)準(zhǔn)包裝: 62
系列: XDCP™
接片: 256
電阻(歐姆): 50k
電路數(shù): 4
溫度系數(shù): 標(biāo)準(zhǔn)值 ±300 ppm/°C
存儲(chǔ)器類(lèi)型: 非易失
接口: I²C(設(shè)備位址)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 管件
9
FN8169.5
April 13, 2007
Instructions
Four of the nine instructions are three bytes in length. These
instructions are:
Read Wiper Counter Register – read the current wiper
position of the selected potentiometer,
Write Wiper Counter Register – change current wiper
position of the selected potentiometer,
Read Data Register – read the contents of the selected
Data Register;
Write Data Register – write a new value to the selected
Data Register.
The basic sequence of the three byte instructions is
illustrated in Figure 5. These three-byte instructions
exchange data between the WCR and one of the Data
Registers. A transfer from a Data Register to a WCR is
essentially a write to a static RAM, with the static RAM
controlling the wiper position. The response of the wiper to
this action is delayed by tWRL. A transfer from the WCR
(current wiper position), to a Data Register is a write to non-
volatile memory and takes a minimum of tWR to complete.
The transfer can occur between one of the four
potentiometer’s WCR, and one of its associated registers,
DRs; or it may occur globally, where the transfer occurs
between all potentiometers and one associated register.
Four instructions require a two-byte sequence to complete.
These instructions transfer data between the host and the
X9259; either between the host and one of the data registers
or directly between the host and the Wiper Counter Register.
These instructions are:
XFR Data Register to Wiper Counter Register – This
transfers the contents of one specified Data Register to
the associated Wiper Counter Register.
XFR Wiper Counter Register to Data Register – This
transfers the contents of the specified Wiper Counter
Register to the specified associated Data Register.
Global XFR Data Register to Wiper Counter
Register – This transfers the contents of all specified Data
Registers to the associated Wiper Counter Registers.
Global XFR Wiper Counter Register to Data
Register – This transfers the contents of all Wiper
Counter Registers to the specified associated Data
Registers.
Increment/Decrement Command
The final command is Increment/Decrement (Figure 6 and
7). The Increment/Decrement command is different from the
other commands. Once the command is issued and the
X9259 has responded with an Acknowledge, the master can
clock the selected wiper up and/or down in one segment
steps; thereby, providing a fine tuning capability to the host.
For each SCL clock pulse (tHIGH) while SDA is HIGH, the
selected wiper moves one wiper position towards the RH
terminal. Similarly, for each SCL clock pulse while SDA is
LOW, the selected wiper moves one resistor wiper position
towards the RL terminal.
See Instruction format for more details.
S
T
A
R
T
01
0
1
A2
A0
A
C
K
I2 I1 I0
RB RA P1
A
C
K
SCL
SDA
S
T
O
P
ID3 ID2 ID1 ID0
P0
Device ID
External
Instruction
Opcode
Address
Register
Address
DCP/WCR
Address
A1
A3
I3
FIGURE 4. TWO-BYTE INSTRUCTION SEQUENCE
I3
I2 I1 I0
RB RA
ID3 ID2 ID1ID0
Device ID
External
Instruction
Opcode
Address
Register
Address
Pot/WCR
Address
Data for WCR[7:0] or DR[7:0]
S
T
A
R
T
01
0
1
A2 A1 A0 A
C
K
P1 P0 A
C
K
SCL
SDA
S
T
O
P
A
C
K
D7 D6 D5 D4 D3 D2 D1 D0
A3
FIGURE 5. THREE-BYTE INSTRUCTION SEQUENCE 2-WIRE INTERFACE
X9259
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