參數資料
| 型號： | X9261UV24I-2.7 |
| 廠商： | Intersil |
| 文件頁數： | 14/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC XDCP DUAL 256TAP 50K 24-TSSOP |
| 標準包裝： | 62 |
| 系列： | XDCP™ |
| 接片： | 256 |
| 電阻（歐姆）： | 50k |
| 電路數： | 2 |
| 溫度系數： | 標準值 ±300 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | 6 線 SPI（芯片選擇，設備位址） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 24-TSSOP |
| 包裝： | 管件 |
3
FN8171.4
October 12, 2006
SYSTEM LEVEL APPLICATIONS
Adjust the contrast in LCD displays
Control the power level of LED transmitters in
communication systems
Set and regulate the DC biasing point in an RF
power amplifier in wireless systems
Control the gain in audio and home entertainment
systems
Provide the variable DC bias for tuners in RF wire-
less systems
Set the operating points in temperature control
systems
Control the operating point for sensors in industrial
systems
Trim offset and gain errors in artificial intelligent
systems
PIN CONFIGURATION
PIN ASSIGNMENTS
PIN DESCRIPTIONS
Bus Interface Pins
SERIAL OUTPUT (SO)
SO is a serial data output pin. During a read cycle,
data is shifted out on this pin. Data is clocked out by
the falling edge of the serial clock.
SERIAL INPUT
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the pots and pot
registers are input on this pin. Data is latched by the
rising edge of the serial clock.
SERIAL CLOCK (SCK)
The SCK input is used to clock data into and out of the
X9261.
SO
A0
NC
VCC
RL0
1
2
3
4
5
6
7
8
9
10
24
23
22
21
20
19
18
17
16
15
HOLD
SCK
NC
VSS
RW1
RH1
RL1
SOIC/TSSOP
X9261
NC
14
13
11
12
NC
RH0
RW0
CS
A1
SI
WP
Pin
(SOIC/
TSSOP)
Symbol
Function
1
SO
Serial Data Output for SPI bus
2
A0
Device Address for SPI bus.
3
NC
No Connect.
4
NC
No Connect.
5
NC
No Connect.
6
NC
No Connect.
7VCC
System Supply Voltage
8RL0
Low Terminal for Potentiometer 0.
9RH0
High Terminal for Potentiometer 0.
10
RW0
Wiper Terminal for Potentiometer 0.
11
CS
Device Address for SPI bus.
12
WP
Hardware Write Protect
13
SI
Serial Data Input for SPI bus
14
A1
Device Address for SPI bus.
15
RL1
Low Terminal for Potentiometer 1.
16
RH1
High Terminal for Potentiometer 1.
17
RW1
Wiper Terminal for Potentiometer 1.
18
VSS
System Ground
19
NC
No Connect
20
NC
No Connect
21
NC
No Connect
22
NC
No Connect
23
SCK
Serial Clock for SPI bus
24
HOLD
Device select. Pause the SPI serial bus.
X9261
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相關代理商/技術參數 |
參數描述 |
|---|---|
| X9261UV24IZ | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Single Supply/Low Power/256-Tap/SPI Bus |
| X9261UV24IZ-2.7 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Single Supply/Low Power/256-Tap/SPI Bus |
| X9261UV24T1 | 功能描述:IC XDCP DUAL 256TAP 50K 24-TSSOP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 數字電位器 系列:XDCP™ 標準包裝:2,500 系列:XDCP™ 接片:256 電阻（歐姆）:100k 電路數:1 溫度系數:標準值 ±300 ppm/°C 存儲器類型:非易失 接口:I²C（設備位址） 電源電壓:2.7 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:14-TSSOP 包裝:帶卷 (TR) |
| X9261UV24Z | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual Digitally-Controlled Potentiometers |
| X9261UV24Z-2.7 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Single Supply/Low Power/256-Tap/SPI Bus |
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