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參數(shù)資料
| 型號(hào)： | X9271TVI |
| 元件分類： | 數(shù)字電位計(jì) |
| 英文描述： | Single Digitally-Controlled (XDCP) Potentiometer |
| 中文描述： | 單數(shù)字控制（數(shù)字電位器）電位 |
| 文件頁(yè)數(shù)： | 4/23頁(yè) |
| 文件大小： | 403K |
| 代理商： | X9271TVI |
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X9271
Characteristics subject to change without notice.
4 of 23
REV 1.1.7 2/6/03
www.xicor.com
PIN DESCRIPTIONS
Bus Interface Pins
S
ERIAL
O
UTPUT
(SO)
SO is a serial data output pin. During a read cycle,
data is shifted out on this pin. Data is clocked out by
the falling edge of the serial clock.
S
ERIAL
I
NPUT
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the pots and pot
registers are input on this pin. Data is latched by the
rising edge of the serial clock.
S
ERIAL
C
LOCK
(SCK)
The SCK input is used to clock data into and out of the
X9271.
H
OLD
(HOLD)
HOLD is used in conjunction with the CS pin to select
the device. Once the part is selected and a serial
sequence is underway, HOLD may be used to pause the
serial communication with the controller without resetting
the serial sequence. To pause, HOLD must be brought
LOW while SCK is LOW. To resume communication,
HOLD is brought HIGH, again while SCK is LOW. If the
pause feature is not used, HOLD should be held HIGH at
all times. CMOS level input.
D
EVICE
A
DDRESS
(A1 - A0)
The address inputs are used to set the the 8-bit slave
address. A match in the slave address serial data
stream must be made with the address input in order to
initiate communication with the X9271.
C
HIP
S
ELECT
(CS)
When CS is HIGH, the X9271 is deselected and the
SO pin is at high impedance, and (unless an internal
write cycle is underway) the device will be in the
standby state. CS LOW enables the X9271, placing it
in the active power mode. It should be noted that after
a power-up, a HIGH to LOW transition on CS is
required prior to the start of any operation.
Potentiometer Pins
R
H
, R
L
The R
connections on a mechanical potentiometer.
H
and R
L
pins are equivalent to the terminal
R
W
The wiper pin are equivalent to the wiper terminal of a
mechanical potentiometer.
Supply Pins
S
YSTEM
S
UPPLY
V
OLTAGE
(V
CC
)
AND
S
UPPLY
G
ROUND
(V
SS
pin
)
The V
is the system ground.
CC
pin is the system supply voltage. The V
SS
Other Pins
H
ARDWARE
W
RITE
P
ROTECT
I
NPUT
(WP)
The WP pin when LOW prevents nonvolatile writes to
the Data Registers.
N
O
C
ONNECT
.
No connect pins should be left floating. This pins are
used for Xicor manufacturing and testing purposes.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X9271TVI-2.7 | Single Digitally-Controlled (XDCP) Potentiometer |
| X9271UB | Single Digitally-Controlled (XDCP) Potentiometer |
| X9271UB-2.7 | Single Digitally-Controlled (XDCP) Potentiometer |
| X9271UBI | Single Digitally-Controlled (XDCP) Potentiometer |
| X9271UV | Single Digitally-Controlled (XDCP) Potentiometer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X9271TVI-2.7 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Single Supply/Low Power/256-Tap/SPI Bus |
| X9271TXXX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DIGITAL POTENTIOMETER|CMOS|BGA|PLASTIC |
| X9271TXXX-2.7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DIGITAL POTENTIOMETER|CMOS|BGA|PLASTIC |
| X9271TXXXI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DIGITAL POTENTIOMETER|CMOS|BGA|PLASTIC |
| X9271TXXXI-2.7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DIGITAL POTENTIOMETER|CMOS|BGA|PLASTIC |
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