參數(shù)資料
型號: X9279UV14ZT1
廠商: Intersil
文件頁數(shù): 4/18頁
文件大?。?/td> 0K
描述: IC XDCP SGL 256TAP 50K 14-TSSOP
標準包裝: 2,500
系列: XDCP™
接片: 256
電阻(歐姆): 50k
電路數(shù): 1
溫度系數(shù): 標準值 ±300 ppm/°C
存儲器類型: 非易失
接口: I²C(設(shè)備位址)
電源電壓: 4.5 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 帶卷 (TR)
12
FN8175.4
September 23, 2009
DC Electrical Specifications
Over the recommended Operating Conditions unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ICC1
VCC Supply Current (Active)
fSCL = 400kHz; VCC = +6V; SDA = Open;
(for 2-Wire, Active, Read and Volatile Write States
only)
3mA
ICC2
VCC Supply Current
(Non-volatile Write)
fSCL = 400kHz; VCC = +6V; SDA = Open
(for 2-Wire, Active, Non-volatile Write State only)
5mA
ISB
VCC Current (Standby)
VCC = +6V; VIN = VSS or VCC; SDA = VCC
(for 2-Wire, Standby State only)
5A
ILI
Input Leakage Current
VIN = VSS to VCC
10
A
ILO
Output Leakage Current
VOUT = VSS to VCC
10
A
VIH
Input HIGH Voltage
VCC x 0.7
VCC + 1
V
VIL
Input LOW Voltage
-1
VCC x 0.3
V
VOL
Output LOW Voltage
IOL = 3mA
0.4
V
Endurance and Data Retention
PARAMETER
MIN
UNITS
Minimum Endurance
100,000
Data changes per bit per register
Data Retention
100
years
Capacitance
SYMBOL
TEST
TYP
UNITS
TEST CONDITIONS
CIN/OUT
Input /Output capacitance (SDA)
8
pF
VOUT = 0V
CIN
Input capacitance (SCL, WP, A2, A1 and A0)
6
pF
VIN = 0V
Power-Up Timing
SYMBOL
PARAMETER
MIN
MAX
UNITS
tr VCC (Note 15)
VCC Power-up rate
0.2
50
V/ms
tPUR (Note 16)
Power-up to initiation of read operation
1
ms
tPUW (Note 16)
Power-up to initiation of write operation
50
ms
NOTES:
15. This parameter is not 100% tested.
16. tPUR and tPUW are the delays required from the time the (last) power supply (VCC-) is stable until the specific instruction can be issued. These
parameters are periodically sampled and not 100% tested.
AC Test Conditions
Input Pulse Levels
VCC x 0.1 to VCC x 0.9
Input rise and fall times
10ns
Input and output timing level
VCC x 0.5
X9279
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