The recommended power-up sequence is to apply V
參數(shù)資料
型號: X9313ZST1
廠商: Intersil
文件頁數(shù): 10/12頁
文件大?。?/td> 0K
描述: IC XDCP 32-TAP 1K 3-WIRE 8-SOIC
標(biāo)準(zhǔn)包裝: 2,500
系列: XDCP™
接片: 32
電阻(歐姆): 1k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 ±300 ppm/°C
存儲(chǔ)器類型: 非易失
接口: 3 線串行(芯片選擇,遞增,增/減)
電源電壓: 4.5 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 帶卷 (TR)
7
FN8177.6
January 15, 2008
Power-Up and Power-Down Requirements
The recommended power-up sequence is to apply VCC/VSS
first, then the potentiometer voltages. During power-up, the
data sheet parameters for the DCP do not fully apply until
1ms after VCC reaches its final value. The VCC ramp
specification is always in effect. In order to prevent unwanted
tap position changes, or an inadvertent store, bring the CS
and INC high before or concurrently with the VCC pin on
power-up.
AC Electrical Specifications
Over recommended operating conditions, unless otherwise stated.
SYMBOL
PARAMETER
LIMITS
UNIT
MIN
TYP
(Note 4)
MAX
tCI
CS to INC Setup
100
ns
tID
INC HIGH to U/D Change
100
ns
tDI
U/D to INC Setup
2.9
s
tIL
INC LOW Period
1
s
tIH
INC HIGH Period
1
s
tIC
INC Inactive to CS Inactive
1
s
tCPH
CS Deselect Time (STORE)
20
ms
tCPH
CS Deselect Time (NO STORE)
100
ns
tIW
INC to VW Change
5
s
tCYC
INC Cycle Time
2
s
tR, tF (Note 5)
INC Input Rise and Fall Time
500
s
tPU (Note 5)
Power-up to Wiper Stable
10
s
tR VCC (Note 5)
VCC Power-up Rate
0.2
50
V/ms
tWR (Note 5)
Store Cycle
10
ms
NOTES:
4. Typical values are for TA = +25°C and nominal supply voltage.
5. This parameter is not 100% tested.
CS
INC
U/D
VW
tCI
tIL
tIH
tCYC
tID
tDI
tIW
MI
(SEE NOTE)
tIC
tCPH
tF
tR
10%
90%
NOTE: MI IN THE AC TIMING DIAGRAM REFERS TO THE MINIMUM INCREMENTAL CHANGE IN THE VW OUTPUT DUE TO A CHANGE IN
THE WIPER POSITION.
FIGURE 4. AC TIMING DIAGRAM
X9313
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