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| 型號(hào)： | X93156UM8IZ-2.7T1 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 7/7頁 |
| 文件大小： | 0K |
| 描述： | IC POT DGTL 50K OHM 8-MSOP |
| 產(chǎn)品培訓(xùn)模塊： | Digitally Controlled Potentiometers |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | XDCP™ |
| 接片： | 32 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 ±35 ppm/°C |
| 存儲(chǔ)器類型： | 非易失 |
| 接口： | 3 線串行（芯片選擇，遞增，增/減） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-MSOP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 1237 (CN2011-ZH PDF) |
| 其它名稱： | X93156UM8IZ-2.7T1DKR |
7
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN8182.3
November 21, 2007
X93156
Mini Small Outline Plastic Packages (MSOP)
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-187BA.
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs and are measured at Datum Plane. Mold flash, protrusion
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions
and are measured at Datum Plane.
Interlead flash and
protrusions shall not exceed 0.15mm (0.006 inch) per side.
5. Formed leads shall be planar with respect to one another within
0.10mm (0.004) at seating Plane.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Datums
and
to be determined at Datum plane
.
11. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only.
L
0.25
(0.010)
L1
R1
R
4X
θ
4X
θ
GAUGE
PLANE
SEATING
PLANE
E
E1
N
12
TOP VIEW
INDEX
AREA
-C-
-B-
0.20 (0.008)
A B C
SEATING
PLANE
0.20 (0.008)
C
0.10 (0.004)
C
-A-
-H-
SIDE VIEW
b
e
D
A
A1
A2
-B-
END VIEW
0.20 (0.008)
C D
E1
CL
C
a
- H -
-A -
- B -
- H -
M8.118 (JEDEC MO-187AA)
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
0.037
0.043
0.94
1.10
-
A1
0.002
0.006
0.05
0.15
-
A2
0.030
0.037
0.75
0.95
-
b
0.010
0.014
0.25
0.36
9
c
0.004
0.008
0.09
0.20
-
D
0.116
0.120
2.95
3.05
3
E1
0.116
0.120
2.95
3.05
4
e
0.026 BSC
0.65 BSC
-
E
0.187
0.199
4.75
5.05
-
L
0.016
0.028
0.40
0.70
6
L1
0.037 REF
0.95 REF
-
N8
8
7
R
0.003
-
0.07
-
R1
0.003
-
0.07
-
05o
15o
5o
15o
-
α
0o
6o
0o
6o
-
Rev. 2 01/03
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| X93156WM8I | 功能描述:IC XDCP 32-TAP 12.5K 3WIRE 8MSOP RoHS:否 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:32 電阻（歐姆）:50k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 50 ppm/°C 存儲(chǔ)器類型:易失 接口:3 線串行（芯片選擇，遞增，增/減） 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 細(xì)型，TSOT-23-6 供應(yīng)商設(shè)備封裝:TSOT-23-6 包裝:帶卷 (TR) |
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