參數(shù)資料
型號: X9315UMI-2.7T2
廠商: Intersil
文件頁數(shù): 1/16頁
文件大?。?/td> 0K
描述: IC XDCP 32-TAP 50K 3WIRE 8-MSOP
標(biāo)準(zhǔn)包裝: 2,500
系列: XDCP™
接片: 32
電阻(歐姆): 50k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 ±300 ppm/°C
存儲器類型: 非易失
接口: 3 線串行(芯片選擇,遞增,增/減)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-MSOP
包裝: 帶卷 (TR)
1
FN8179.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X9315
Low Noise, Low Power, 32 Taps
Digitally Controlled Potentiometer
(XDCP)
The Intersil X9315 is a digitally controlled potentiometer
(XDCP). The device consists of a resistor array, wiper
switches, a control section, and nonvolatile memory. The
wiper position is controlled by a 3-wire interface.
The potentiometer is implemented by a resistor array
composed of 31 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The position of the
wiper element is controlled by the CS, U/D, and INC inputs.
The position of the wiper can be stored in nonvolatile
memory and then be recalled upon a subsequent power-up
operation.
The device can be used as a three-terminal potentiometer or
as a two-terminal variable resistor in a wide variety of
applications including:
Control
Parameter Adjustments
Signal Processing
Features
Solid-state potentiometer
3-wire serial interface
32 wiper tap points
- Wiper position stored in nonvolatile memory and
recalled on power-up
31 resistive elements
- Temperature compensated
- End to end resistance range ± 20%
- Terminal voltage, 0 to VCC
Low power CMOS
-VCC = 2.7V or 5V
- Active current, 80/400A max.
- Standby current, 5A max.
High reliability
- Endurance, 100,000 data changes per bit
- Register data retention, 100 years
RTOTAL values = 10kΩ, 50kΩ, 100kΩ
Packages
- 8 Ld SOIC, MSOP and PDIP
Pb-free available (RoHS compliant)
Block Diagram
5-Bit
Up/Down
Counter
5-Bit
Nonvolatile
Memory
Store and
Recall
Control
Circuitry
One
of
Decoder
Resistor
Array
RH/VH
U/D
INC
CS
Transfer
Gates
Thirty
VCC
VSS
RL/VL
RW/VW
Control
and
Memory
Up/Down
(U/D)
Increment
(INC)
Device Select
(CS)
VCC (Supply Voltage)
VSS (Ground)
RH/VH
RW/VW
RL/VL
General
Detailed
0
1
2
28
29
30
31
Two
Data Sheet
December 21, 2009
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