參數(shù)資料
型號: X9400WS24I
元件分類: 數(shù)字電位計(jì)
英文描述: QUAD 10K DIGITAL POTENTIOMETER, 3-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDSO24
封裝: PLASTIC, SOIC-24
文件頁數(shù): 4/22頁
文件大?。?/td> 555K
代理商: X9400WS24I
X9400
Characteristics subject to change without notice.
12 of 22
REV 1.1.8 3/31/04
www.xicor.com
A.C. TEST CONDITIONS
Notes: (4) This parameter is periodically sampled and not 100% tested
(5) tPUR and tPUW are the delays required from the time the
third (last) power supply (VCC, V+ or V-) is stable until the
specic instruction can be issued. These parameters are
periodically sampled and not 100% tested.
SPICE Macro Model
SYMBOL TABLE
Input pulse levels
VCC x 0.1 to VCC x 0.9
Input rise and fall times
10ns
Input and output timing level
VCC x 0.5
10pF
RH
RTOTAL
CH
25pF
CW
CL
10pF
RW
RL
WAVEFORM
INPUTS
OUTPUTS
Must be
steady
Will be
steady
May change
from Low to
High
Will change
from Low to
High
May change
from High to
Low
Will change
from High to
Low
Don’t Care:
Changes
Allowed
Changing:
State Not
Known
N/A
Center Line
is High
Impedance
AC TIMING
Symbol
Parameter
Min.
Max.
Unit
fSCK
SSI/SPI clock frequency
2.0
MHz
tCYC
SSI/SPI clock cycle time
500
ns
tWH
SSI/SPI clock high time
200
ns
tWL
SSI/SPI clock low time
200
ns
tLEAD
Lead time
250
ns
tLAG
Lag time
250
ns
tSU
SI, SCK, HOLD and CS input setup time
50
ns
tH
SI, SCK, HOLD and CS input hold time
50
ns
tRI
SI, SCK, HOLD and CS input rise time
2
s
tFI
SI, SCK, HOLD and CS input fall time
2
s
tDIS
SO output disable time
0
500
ns
tV
SO output valid time
100
ns
tHO
SO output hold time
0
ns
tRO
SO output rise time
50
ns
tFO
SO output fall time
50
ns
tHOLD
HOLD time
400
ns
tHSU
HOLD setup time
100
ns
tHH
HOLD hold time
100
ns
tHZ
HOLD low to output in High Z
100
ns
tLZ
HOLD high to output in Low Z
100
ns
TI
Noise suppression time constant at SI, SCK, HOLD and CS inputs
20
ns
tCS
CS deselect time
2
s
tWPASU
WP, A0 and A1 setup time
0
ns
tWPAH
WP, A0 and A1 hold time
0
ns
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