參數(shù)資料
型號: X9418
元件分類: 數(shù)字電位計(jì)
英文描述: Dual 2-Wire EEPOT Nonvolatile Digital Potentiometer(2個EEPOT,IIC接口,直接寫入/讀出滑動端位置,低噪聲,非易失性數(shù)字電位器)
中文描述: 雙2線EEPOT非易失數(shù)字電位器(2個EEPOT,國際進(jìn)口接口,直接寫入/讀出滑動端位置,低噪聲,非易失性數(shù)字電位器)
文件頁數(shù): 12/20頁
文件大?。?/td> 139K
代理商: X9418
X9418
12
D.C. OPERATING CHARACTERISTICS
(Over the recommended operating conditions unless otherwise specified.)
7028 FMT15
Notes:
(1) Absolute Linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a
potentiometer.
(2) Relative Linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a
potentiometer. It is a measure of the error in step size.
(3) MI = RTOT/63 or (V
H
– V
L
)/63, single pot
(4) Max. = all four arrays cascaded together, Typical = individual array resolutions.
ENDURANCE AND DATA RETENTION
7028 FMT16
CAPACITANCE
7028 FMT17
POWER-UP TIMING
7028 FMT18
Symbol
Parameter
Limits
Typ.
Test Conditions
f
SCL
= 400KHz, SDA = Open,
Other Inputs = V
SS
f
SCL
= 400KHz, SDA = Open,
Other Inputs = V
SS
SCL = SDA = V
CC
, Addr. = V
SS
V
IN
= V
SS
to V
CC
V
OUT
= V
SS
to V
CC
Min.
Max.
Units
I
CC1
V
CC
Supply Current
(Nonvolatile Write)
1
mA
I
CC2
V
CC
Supply Current (Move
Wiper, Write, Read)
100
μ
A
I
SB
I
LI
I
LO
V
IH
V
IL
V
OL
V
CC
Current (Standby)
1
μ
A
Input Leakage Current
10
μ
A
Output Leakage Current
10
μ
A
Input HIGH Voltage
V
CC
x 0.7
V
CC
x 0.5
V
CC
x 0.1
V
Input LOW Voltage
–0.5
V
Output LOW Voltage
0.4
V
I
OL
= 3mA
Parameter
Minimum Endurance
Data Retention
Min.
100,000
100
Units
Data Changes per Register
Years
Symbol
Test
Max.
8
6
Units
pF
pF
Test Conditions
V
I/O
= 0V
V
IN
= 0V
C
I/O
(5)
C
IN
(5)
Input/Output Capacitance (SDA)
Input Capacitance (A0, A1, A2, A3, and SCL)
Symbol
Parameter
Max.
1
5
Units
ms
ms
t
PUR
(6)
t
PUW
(6)
A.C. TEST CONDITIONS
Power-up to Initiation of Read Operation
Power-up to Initiation of Write Operation
7028 FMT19
Notes:
(5) This parameter is periodically sampled and not 100% tested
(6) t
PUR
and t
PUW
are the delays required from the time the
third (last) power supply (Vcc, V+ or V-) is stable until the
specific instruction can be issued. These parameters are
periodically sampled and not 100% tested.
(7) The bias order of power supply (Vcc, V+ and V-) don’t care.
EQUIVALENT A.C. LOAD CIRCUIT
I
nput Pulse Levels
V
CC
x 0.1 to V
CC
x 0.9
10ns
V
CC
x 0.5
Input Rise and Fall Times
Input and Output Timing Level
5V
1533
100pF
SDA OUTPUT
2.7V
100pF
7028 FM14
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