參數(shù)資料
型號(hào): X9429WV14I-2.7T1
廠商: Intersil
文件頁(yè)數(shù): 5/20頁(yè)
文件大小: 0K
描述: IC XDCP SGL 64-TAP 10K 14-TSSOP
標(biāo)準(zhǔn)包裝: 2,500
系列: XDCP™
接片: 64
電阻(歐姆): 10k
電路數(shù): 1
溫度系數(shù): 標(biāo)準(zhǔn)值 ±300 ppm/°C
存儲(chǔ)器類型: 非易失
接口: I²C(設(shè)備位址)
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 帶卷 (TR)
13
FN8248.3
October 13, 2008
ENDURANCE AND DATA RETENTION
CAPACITANCE
POWER-UP TIMING
Power-up and Power-down Requirements
There are no restrictions on the power-up or power-down
conditions of VCC and the voltage applied to the
potentiometer pins provided that VCC is always more
positive than or equal to VH, VL, and VW, i.e., VCC ≥ VH, VL,
VW. The VCC ramp rate spec is always in effect.
AC Test Conditions
Equivalent AC Load Circuit
Circuit #3 SPICE Macro Model
ILO
Output Leakage Current
VOUT = VSS to VCC
10
A
VIH
Input HIGH Voltage
VCC x 0.7
VCC x 0.5
V
VIL
Input LOW Voltage
-0.5
VCC x 0.1
V
VOL
Output LOW voltage
IOL = 3mA
0.4
V
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
MIN.
(Note 7)
TYP
MAX.
(Note 7)
UNIT
PARAMETER
MIN.
UNIT
Minimum Endurance
100,000
Data changes per bit per register
Data Retention
100
Years
SYMBOL
TEST
TYP
UNIT
TEST CONDITIONS
CI/O (Note 5)
Input/output capacitance (SDA)
8
pF
VI/O = 0V
CIN (Note 5)
Input capacitance (A0, A2,and A3 and SCL)
6
pF
VIN = 0V
SYMBOL
PARAMETER
MIN
TYP
MAX
UNIT
tRVCC (Note 6)
VCC Power-up ramp rate
0.2
50
V/ms
NOTES:
1. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a
potentiometer.
2. Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potentiometer. It is
a measure of the error in step size.
3. MI = RTOT/63 or (RH - RL)/63, single pot
4. Typical = individual array resolutions.
5. Limits established by characterization and are not production tested.
6. Sample tested only.
7. Parts are 100% tested at +25°C. Over temperature limits established by characterization and are not production tested.
Input pulse levels
VCC x 0.1 to VCC x 0.9
Input rise and fall times
10ns
Input and output timing level
VCC x 0.5
5V
1533
Ω
100pF
SDA OUTPUT
2.7V
100pF
10pF
RH
RTOTAL
CH
25pF
CW
CL
10pF
RW
RL
X9429
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