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參數(shù)資料
| 型號： | X9429YV14Z |
| 廠商： | Intersil |
| 文件頁數(shù)： | 15/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC XDCP SGL 64-TAP 2.5K 14-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 95 |
| 系列： | XDCP™ |
| 接片： | 64 |
| 電阻（歐姆）： | 2.5k |
| 電路數(shù)： | 1 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 ±300 ppm/°C |
| 存儲器類型： | 非易失 |
| 接口： | I²C（設(shè)備位址） |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-TSSOP |
| 包裝： | 管件 |
4
FN8248.3
October 13, 2008
Pinouts
X9429
(14 LD TSSOP)
TOP VIEW
X9429
(16 LD SOIC)
TOP VIEW
Pin Assignments
Pin Descriptions
Host Interface Pins
SERIAL CLOCK (SCL)
The SCL input is used to clock data into and out of the
X9429.
SERIAL DATA (SDA)
SDA is a bidirectional pin used to transfer data into and out of
the device. It is an open drain output and may be wire-ORed
with any number of open drain or open collector outputs. An
open drain output requires the use of a pull-up resistor. For
selecting typical values, refer to the guidelines for calculating
typical values on the bus pull-up resistors graph.
DEVICE ADDRESS (A0, A2, A3)
The Address inputs are used to set the least significant 3 bits
of the 8-bit slave address. A match in the slave address
serial data stream must be made with the Address input in
order to initiate communication with the X9429. A maximum
of 8 devices may occupy the 2-wire serial bus.
Potentiometer Pins
RH/VH, RL/VL
The RH/VH and RL/VL inputs are equivalent to the terminal
connections on either end of a mechanical potentiometer.
RW/VW
The wiper outputs are equivalent to the wiper output of a
mechanical potentiometer.
HARDWARE WRITE PROTECT INPUT WP
The WP pin when low prevents nonvolatile writes to the Data
Registers.
Principals of Operation
The X9429 is a highly integrated microcircuit incorporating a
resistor array and its associated registers and counters and
the serial interface logic providing direct communication
between the host and the XDCP potentiometers.
Serial Interface
The X9429 supports a bidirectional bus oriented protocol.
The protocol defines any device that sends data onto the
VCC
RL/VL
VSS
1
2
3
4
5
6
7
8
14
13
12
11
10
9
NC
RW/VW
SCL
A2
RH/VH
X9429
NC
SDA
A3
WP
A0
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
X9429
VCC
RL/VL
RW/VW
RH/VH
A3
WP
A0
NC
VSS
SCL
A2
NC
SDA
NC
TSSOP PIN
SOIC PIN
SYMBOL
BRIEF DESCRIPTION
1, 2, 3
12, 3, 7, 15
NC
No Connect
4
A2
Device Address for 2-wire bus.
5
SCL
Serial Clock for 2-wire bus.
6
SDA
Serial Data Input/Output for 2-wire bus.
78
VSS
System Ground
89
WP
Hardware Write Protect
9
10
A0
Device Address for 2-wire bus.
10
11
A3
Device Address for 2-wire bus.
11
12
RW/VW
Wiper Terminal of the Potentiometer.
12
13
RH/VH
High Terminal of the Potentiometer.
13
14
RL/VL
Low Terminal of the Potentiometer.
14
16
VCC
System Supply Voltage
X9429
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