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參數(shù)資料
| 型號(hào)： | X9438YS24I |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字電位計(jì) |
| 英文描述： | RECTIFIER BRIDGE 2A 200V 65A-ifsm 1.1V-vf 5uA-ir KBP 35/TUBE |
| 中文描述： | DUAL 10K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDSO24 |
| 封裝： | PLASTIC, SOIC-24 |
| 文件頁(yè)數(shù)： | 3/18頁(yè) |
| 文件大?。?/td> | 280K |
| 代理商： | X9438YS24I |
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3
FN8199.0
March 11, 2005
PRINCIPLES OF OPERATION
The X9438 is an integrated microcircuit incorporating
two resistor arrays, two operational amplifiers and
their associated registers and counters; and the serial
interface
logic
providing
between the host and the digitally controlled potenti-
ometers and operational amplifiers.
direct
communication
Serial Interface
The X9438 supports a bidirectional bus oriented proto-
col. The protocol defines any device that sends data
onto the bus as a transmitter and the receiving device
as the receiver. The device controlling the transfer is a
master and the device being controlled is the slave.
The master will always initiate data transfers and pro-
vide the clock for both transmit and receive operations.
Therefore, the X9438 will be considered a slave
device in all applications.
Clock and Data Conventions
Data states on the SDA line can change only during
SCL LOW periods (t
LOW
). SDA state changes during
SCL HIGH are reserved for indicating start and stop
conditions.
Start Condition
All commands to the X9438 are preceded by the start
condition, which is a HIGH to LOW transition of SDA
while SCL is HIGH (t
HIGH
). The X9438 continuously
monitors the SDA and SCL lines for the start condition
and will not respond to any command until this condi-
tion is met.
Stop Condition
All communications must be terminated by a stop con-
dition, which is a LOW to HIGH transition of SDA while
SCL is HIGH.
Acknowledge
Acknowledge is a software convention used to provide
a positive handshake between the master and slave
devices on the bus to indicate the successful receipt of
data. The transmitting device, either the master or the
slave, will release the SDA bus after transmitting eight
bits. The master generates a ninth clock cycle and dur-
ing this period the receiver pulls the SDA line LOW to
acknowledge that it successfully received the eight bits
of data.
The X9438 will respond with an acknowledge after
recognition of a start condition and its slave address
and once again after successful receipt of the com-
mand byte. If the command is followed by a data byte
the X9438 will respond with a final acknowledge.
Operational Amplifier
The voltage operational amplifiers are CMOS rail-to-
rail output general purpose amplifiers. They are
designed to operate from dual (±) power supplies. The
amplifiers may be configured like any standard ampli-
fier. All pins are externally available to allow connec-
tions with the potentiometers or as stand alone
amplifiers.
Potentiometer/Array Description
The X9438 is comprised of two resistor arrays and two
operational amplifiers. Each array contains 63 discrete
resistive segments that are connected in series. The
physical ends of each array are equivalent to the fixed
terminals of a mechanical potentiometer (RH and RL
inputs).
At both ends of each array and between each resistor
segment is a CMOS switch connected to the wiper
(R
W
) output. Within each individual array only one
switch may be turned on at a time. These switches are
controlled by a volatile wiper counter register (WCR).
The six bits of the WCR are decoded to select, and
enable, one of sixty-four switches.
The WCR may be written directly, or it can be changed
by transferring the contents of one of four associated
data registers into the WCR. These data registers and
the WCR can be read and written by the host system.
INSTRUCTIONS AND PROGRAMMING
Device Addressing
Following a start condition the master must output the
address of the slave it is accessing. The most signifi-
cant four bits of the slave address are the device type
identifier (refer to Figure 1). For the X9438 this is fixed
as 0101[B].
Figure 1. Address/Identification Byte Format
1
0
0
A3
A2
A1
A0
Device Type
Identifier
Device Address
1
X9438
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X9438YS24I-2.7 | RECTIFIER BRIDGE 2A 400V 65A-ifsm 1.1V-vf 5uA-ir KBP 35/TUBE |
| X9438YV24I | RECTIFIER BRIDGE 2A 600V 65A-ifsm 1.1V-vf 5uA-ir KBP 35/TUBE |
| X9438WV24I-2.7 | Dual Digitally Controlled Potentiometer (XDCP) with Operational Amplifier |
| X9438WV24-2.7 | Dual Digitally Controlled Potentiometer (XDCP) with Operational Amplifier |
| X9438WV24I | Dual Digitally Controlled Potentiometer (XDCP) with Operational Amplifier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X9438YS24I-2.7 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual Digitally Controlled Potentiometer (XDCP) with Operational Amplifier |
| X9438YV24 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual Digitally Controlled Potentiometer (XDCP) with Operational Amplifier |
| X9438YV24-2.7 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual Digitally Controlled Potentiometer (XDCP) with Operational Amplifier |
| X9438YV24I | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual Digitally Controlled Potentiometer (XDCP) with Operational Amplifier |
| X9438YV24I-2.7 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual Digitally Controlled Potentiometer (XDCP) with Operational Amplifier |
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