參數(shù)資料
型號: X9448YS24I-2.7
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計
英文描述: Mixed Signal with 2-Wire Interface
中文描述: 2.5K DIGITAL POTENTIOMETER, 2-WIRE SERIAL CONTROL INTERFACE, 64 POSITIONS, PDSO24
封裝: PLASTIC, SOIC-24
文件頁數(shù): 2/20頁
文件大?。?/td> 127K
代理商: X9448YS24I-2.7
X9448
Characteristics subject to change without notice.
2 of 20
REV 1.0 6/21/00
www.xicor.com
PIN DESCRIPTIONS
Host Interface Pins
Serial Clock (SCL)
The SCL input is used to clock data into and out of the
X9448.
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into and
out of the device. It is an open drain output and may be
wire-ORed with any number of open drain or open col-
lector outputs. An open drain output requires the use of
a pull-up resistor. For selecting typical values, refer to
the guidelines for calculating typical values on the bus
pull-up resistors graph.
Device Address (A
The address inputs are used to set the least significant
4 bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
address input in order to initiate communication with
the X9448. A maximum of 16 devices may share the
same 2-wire serial bus.
0
–A
3
)
Potentiometer Pins
V
The V
connections on either end of a mechanical potentiometer.
H
(V
H0
–V
and V
H1
), V
L
(V
L0
–V
L1
)
H
L
inputs are equivalent to the terminal
V
The wiper output is equivalent to the wiper output of a
mechanical potentiometer and is connected to the
inverting input of the voltage comparator.
W
(V
W0
–V
W1
)
Comparator and Device Pins
Voltage Input V
V
NI0
and V
inverting) inputs of the two comparators.
NI0
, V
NI1
NI1
are the input voltages to the plus (non-
Buffered Voltage Outputs V
The V
OUT0
, and V
comparator outputs enabled by respective bits in the
volatile analog control register.
OUT0
, V
OUT1
OUT1
are the buffered voltage
Hardware Write Protect Input WP
The
WP
pin when low prevents nonvolatile writes to the
wiper counter and analog control registers.
Analog Supplies V+, V-
The analog supplies V+, V- are the supply voltages for
the XDCP analog section and the voltage comparators.
System Supply V
The system supply V
to bias the interface and control circuits.
CC
and Ground V
and its reference V
SS
CC
SS
is used
PIN CONFIGURATION
V
CC
V
L0
V
H0
V
W0
A
2
WP
SDA
A1
1
2
3
4
5
6
7
8
9
10
24
23
22
21
20
19
18
17
16
V+
V
OUT0
V
NI0
NC
A0
NC
A
3
SCL
NC
V
NI1
V
OUT1
SOIC
X9448
V
SS
13
11
12
V
L1
V
H1
V
W1
V
CC
NC
V
L1
V
H1
V
W1
WP
A
2
V
W0
SDA
A
1
A
3
SCL
NC
V-
V
NI1
TSSOP
V
SS
V
L0
V
H0
V
OUT1
V+
V
OUT0
V
NI0
A
0
NC
V-
15
14
1
2
3
4
5
6
7
8
9
10
24
23
22
21
20
19
18
17
16
X9448
13
11
12
15
14
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