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參數(shù)資料
| 型號： | X9455WV24I-2.7 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字電位計 |
| 英文描述： | Dual Two-wiper Digitally-Controlled (XDCP) Potentiometer |
| 中文描述： | DUAL 10K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 256 POSITIONS, PDSO24 |
| 封裝： | 4.40 MM, TSSOP-24 |
| 文件頁數(shù)： | 12/18頁 |
| 文件大?。?/td> | 372K |
| 代理商： | X9455WV24I-2.7 |
12
FN8202.0
November 10, 2004
The registers are organized in pages of four, with one page
consisting of the four volatile WCRs, a second page
consisting of the Level 0 Data Registers, and so forth. These
pages can be written four bytes at time. In this manner all
four potentiometer WCRs can be updated in a single serial
write (see Page Write Operation), as well as all four registers
of a given page in the DR array.
The unique feature of the X9455 device is that writing or
reading to a Data Register of a given wiper automatically
updates the WCR of that wiper with the new value. In this
manner data can be moved from a particular wiper register
to that wiper’s WCR just by performing a 2-wire read
operation. Simultaneously, that data byte can be utilized by
the host.
Status Register Organization
The Status Register (SR) is used in read and write
operations to select the appropriate wiper register. Before
any wiper register can be accessed, the SR must be set to
the correct value. It is accessed by setting the Address Byte
to 07h. See Table 3. Do this by writing the slave address
followed by a byte address of 07h. The SR is volatile and
defaults to 00h on power up. It is an 8-bit register containing
three control bits in the 3 LSBs as follows:
Bits WCRSel1 and WCRSel0 determine which Data Register
of a wiper is selected for a given operation. NVEnable is
used to select the volatile WCR if “0”, and one of the non
volatile wiper registers if “1”. Table 3 shows this register
organization.
Wiper Addressing for 2-wire Interface
Once the Data Register Level has been selected by a 2-wire
instruction, then the wiper is determined by the Address Byte
of the following instruction. Note again that this enables a
complete page write of all four potentiometers at once a
particular Wiper Register has been chosen. The register
addresses accessible in the X9455 include:
TABLE 3. REGISTER NUMBERING
STATUS REG (NOTE 1)
(Addr: 07H)
REGISTERED SELECTED (NOTE 2)
Reserved
bits 7-3
DRSel1
bit 2
DRSel0
bit 1
NVEnable
bit 0
DCP0
DCP2
(Addr: 00h)
(Addr: 11h)
(Addr: 02h)
(Addr: 01h)
Reserved
X
X
0
WCR0A
WCR0B
WCR1A
WCR1B
0
0
1
DR0A0
DR0B0
DR1A0
DR1B0
0
1
1
DR0A1
DR0B1
DR1A1
DR1B1
1
0
1
DR0A2
DR0B2
DR1A2
DR1B2
1
1
1
DR0A3
DR0B3
DR1A3
DR1B3
NOTES:To read or write the contents of a single Data Register or Wiper Register:
1.
Load the status register (using a write command) to select the row.
(See Figure 6.)
Writing a 1, 3, 5, or 7 to the Status Register specifies that the subsequent read or write command will access a Data Register. This Status
Register operation also initiates a transfer of the contents of the selected data register to its associated WCR for all DCPs. So, for example,
writing ‘03h’ to the status register causes the value in DR01 to move to WCR0, DR11 to move to WCR1, DR21 to move to WCR2, and DR31 to
move to WCR3.
Writing a 0 to bit ‘0’ of the Status Register specifies that the subsequent read or write command will access a Wiper Counter Register. Each
WCR can be written to individually, without affecting the contents of any other.
2.
Access the desired DR or WCR using a new write or read command
(see Figure 7 for write and Figure 9 for read.)
Specify the desired column (DCP number) by sending the DCP address as part of this read or write command.
7
6
5
4
3
2
1
0
Reserved
WCRSel1
WCRSel0
NVEnable
X9455
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