參數(shù)資料
型號: X9523B20I-A
廠商: INTERSIL CORP
元件分類: 數(shù)字電位計
英文描述: RECTIFIER FAST-RECOVERY SINGLE 3A 50V 125A-ifsm 0.95V-vf 35ns 5uA-ir DO-201AD 1.2K/REEL-13
中文描述: DIGITAL POTENTIOMETER, BGA20
封裝: BGA-20
文件頁數(shù): 6/30頁
文件大?。?/td> 509K
代理商: X9523B20I-A
6
FN8209.0
March 10, 2005
final STOP condition), the X9523 initiates an internal high
voltage write cycle. This cycle typically requires 5 ms.
During this time, no further Read or Write commands can
be issued to the device. Write Acknowledge Polling is
used to determine when this high voltage write cycle has
been completed.
To perform acknowledge polling, the master issues a
START condition followed by a Slave Address Byte. The
Slave Address issued must contain a valid Internal
Device Address. The LSB of the Slave Address (R/W)
can be set to either 1 or 0 in this case. If the device is still
busy
with
the
high
voltage
ACKNOWLEDGE will be returned. If the device has
completed the write operation, an ACKNOWLEDGE will
be returned and the host can then proceed with a read or
write operation. (Refer to Figure 5.).
cycle
then
no
DIGITALLY CONTROLLED POTENTIOMETERS
DCP Functionality
The X9523 includes two independent resistor arrays.
These arrays respectively contain 99 and 255 discrete
resistive segments that are connected in series. The
physical ends of each array are equivalent to the fixed
terminals of a mechanical potentiometer (R
Hx
and R
Lx
inputs - where x = 1,2).
At both ends of each array and between each resistor
segment there is a CMOS switch connected to the wiper
(R
w
x
) output. Within each individual array, only one
switch may be turned on at any one time. These
switches are controlled by the Wiper Counter Register
(WCR) (See Figure 6). The WCR is a volatile register.
On power-up of the X9523, wiper position data is auto-
matically loaded into the WCR from its associated Non
Volatile Memory (NVM) Register. The Table below
shows the Initial Values of the DCP WCR’s before the
contents of the NVM is loaded into the WCR.
ACK
returned
Issue Slave Address
Byte (Read or Write)
Byte load completed
by issuing STOP.
Enter ACK Polling
Issue STOP
Issue START
NO
YES
High Voltage Cycle
complete. Continue
command sequence
Issue STOP
NO
Continue normal
Read or Write
command sequence
PROCEED
YES
Figure 5.
Acknowledge Polling Sequence
DECODER
RESISTOR
ARRAY
R
Hx
FET
SWITCHES
R
Lx
R
Wx
0
1
2
N
WIPER
COUNTER
REGISTER
(WCR)
NON
MEMORY
(NVM)
VOLATILE
“WIPER”
Figure 6.
DCP Internal Structure
DCP
Initial Values Before Recall
V
L
/ TAP = 0
V
H
/ TAP = 255
R
1
/ 100 TAP
R
2
/ 256 TAP
X9523
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