- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376449 > X9523V20I-A (INTERSIL CORP) Laser Diode Control for Fiber Optic Modules PDF資料下載
參數(shù)資料
| 型號： | X9523V20I-A |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字電位計 |
| 英文描述： | Laser Diode Control for Fiber Optic Modules |
| 中文描述： | DIGITAL POTENTIOMETER, PDSO20 |
| 封裝： | PLASTIC, TSSOP-20 |
| 文件頁數(shù)： | 3/30頁 |
| 文件大?。?/td> | 509K |
| 代理商： | X9523V20I-A |
第1頁第2頁當(dāng)前第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁
3
FN8209.0
March 10, 2005
PIN ASSIGNMENT
Pin
XBGA
Name
R
H2
R
w2
R
L2
Function
1
B3
Connection to end of resistor array for (the 256 Tap) DCP 2.
2
A3
Connection to terminal equivalent to the “Wiper” of a mechanical potentiometer for DCP 2.
3
A4
Connection to other end of resistor array for (the 256 Tap) DCP 2.
4
B4
V3
V3 Voltage Monitor Input. V3 is the input to a non-inverting voltage comparator circuit. When
the V3 input is higher than the
V
TRIP3
threshold voltage, V3RO makes a transition to a HIGH
level. Connect V3 to V
SS
when not used.
V3 RESET Output. This open drain output makes a transition to a HIGH level when V3 is
greater than
V
TRIP3
and goes LOW when V3 is less than VTRIP3. There is no delay circuitry
on this pin. The V3RO pin requires the use of an external “pull-up” resistor.
Manual Reset. MR is a TTL level compatible input. Pulling the MR pin active (HIGH) initiates
a reset cycle to the V1RO pin (V1/Vcc RESET Output pin). V1RO will remain HIGH for time
t
purst
after MR has returned to it’s normally LOW state. The reset time can be selected using
bits POR1 and POR0 in the CONSTAT Register. The MR pin requires the use of an external
“pull-down” resistor.
Write Protect Control Pin. WP pin is a TTL level compatible input. When held HIGH, Write Pro-
tection is enabled. In the enabled state, this pin prevents all nonvolatile “write” operations. Al-
so, when the Write Protection is enabled, and the device DCP Write Lock feature is active (i.e.
the DCP Write Lock bit is “1”), then no “write” (volatile or nonvolatile) operations can be per-
formedon the wiper position of any of the integrated Digitally Controlled Potentiometers
(DCPs). The WP pin uses an internal “pull-down” resistor, thus if left floating the write protec-
tion feature is disabled.
Serial Clock. This is a TTL level compatible input pin used to control the serial bus timing for
data input and output.
Serial Data. SDA is a bidirectional TTL level compatible pin used to transfer data into and
out of the device. The SDA pin input buffer is always active (not gated). This pin requires an
external pull up resistor.
Ground.
5
C3
V3RO
6
D3
MR
7
C4
WP
8
D4
SCL
9
E4
SDA
10
E1
Vss
11
E3
R
L1
R
w1
R
H1
Connection to other end of resistor for (the 100 Tap) DCP 1.
12
E2
Connection to terminal equivalent to the “Wiper” of a mechanical potentiometer for DCP 1.
13
D1
Connection to end of resistor array for (the 100 Tap) DCP 1.
17
B1
V2
V2 Voltage Monitor Input. V2 is the input to a non-inverting voltage comparator circuit. When
the V2 input is greater than the
V
TRIP2
threshold voltage, V2RO makes a transition to a HIGH
level. Connect V2 to V
SS
when not used.
V2 RESET Output. This open drain output makes a transition to a HIGH level when V2 is great-
er than
V
TRIP2
, and goes LOW when V2 is less than
V
TRIP2
. There is no power-up reset delay
circuitry on this pin. The V2RO pin requires the use of an external “pull-up” resistor.
V1 / Vcc RESET Output. This is an active HIGH, open drain output which becomes active
whenever V1 / Vcc falls below
V
TRIP1
. V1RO becomes active on power-up and remains ac-
tive for a time t
purst
after the power supply stabilizes (t
purst
can be changed by varying the
POR0 and POR1 bits of the internal control register). The V1RO pin requires the use of an
external “pull-up” resistor. The V1RO pin can be forced active (HIGH) using the manual reset
(MR) input pin.
Supply Voltage.
18
A1
V2RO
19
B2
V1RO
20
A2
V1 / Vcc
14, 15,
16,
C1, C2,
D2
NC
No Connect.
X9523
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| X9523V20I-B | Laser Diode Control for Fiber Optic Modules |
| X9523 | Laser Diode Control for Fiber Optic Modules |
| X9523B20I-A | RECTIFIER FAST-RECOVERY SINGLE 3A 50V 125A-ifsm 0.95V-vf 35ns 5uA-ir DO-201AD 1.2K/REEL-13 |
| X9523B20I-B | RECTIFIER FAST-RECOVERY SINGLE 3A 100V 125A-ifsm 0.95V-vf 35ns 5uA-ir DO-201AD 500/BULK |
| X9525B20I | Fiber Channel/Gigabit Etherner Laser Diode Control for Fiber Optic Modules |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| X9523V20I-AT1 | 功能描述:IC DCP DUAL EEPROM MEM 20-TSSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 激光驅(qū)動器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:激光二極管驅(qū)動器 數(shù)據(jù)速率:- 通道數(shù):4 電源電壓:3.3V 電流 - 電源:- 電流 - 調(diào)制:- 電流 - 偏置:- 工作溫度:0°C ~ 70°C 封裝/外殼:40-TQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN EP 包裝:托盤 安裝類型:表面貼裝 |
| X9523V20I-B | 功能描述:IC DUAL DCP LASER CNTRL 20TSSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 激光驅(qū)動器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:激光二極管驅(qū)動器 數(shù)據(jù)速率:- 通道數(shù):4 電源電壓:3.3V 電流 - 電源:- 電流 - 調(diào)制:- 電流 - 偏置:- 工作溫度:0°C ~ 70°C 封裝/外殼:40-TQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN EP 包裝:托盤 安裝類型:表面貼裝 |
| X9523V20I-BT1 | 功能描述:IC DCP DUAL EEPROM MEM 20-TSSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 激光驅(qū)動器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:60 系列:- 類型:激光二極管驅(qū)動器 數(shù)據(jù)速率:- 通道數(shù):4 電源電壓:3.3V 電流 - 電源:- 電流 - 調(diào)制:- 電流 - 偏置:- 工作溫度:0°C ~ 70°C 封裝/外殼:40-TQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN EP 包裝:托盤 安裝類型:表面貼裝 |
| X9523V20IZ-A | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Laser Diode Control for Fiber Optic Modules |
| X9523V20IZ-B | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Laser Diode Control for Fiber Optic Modules |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。