參數(shù)資料
型號: XA2C128-7CPG132I
廠商: Xilinx Inc
文件頁數(shù): 6/16頁
文件大?。?/td> 0K
描述: IC CPLD 128MC 100 I/O 132CSBGA
產(chǎn)品培訓(xùn)模塊: CoolRunner-II CPLD Starter Kit
標(biāo)準(zhǔn)包裝: 360
系列: CoolRunner II
可編程類型: 系統(tǒng)內(nèi)可編程
最大延遲時(shí)間 tpd(1): 7.0ns
電壓電源 - 內(nèi)部: 1.7 V ~ 1.9 V
邏輯元件/邏輯塊數(shù)目: 8
宏單元數(shù): 128
門數(shù): 3000
輸入/輸出數(shù): 100
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 132-TFBGA,CSPBGA
供應(yīng)商設(shè)備封裝: 132-CSPBGA(8x8)
包裝: 托盤
XA2C128 CoolRunner-II Automotive CPLD
DS554 (v1.2) June 9, 2009
Product Specification
14
R
CoolRunner-II Automotive Requirements and Recommendations
Requirements
The following requirements are for all automotive applica-
tions:
1.
Use a monotonic, fast ramp power supply to power up
CoolRunner-II. A VCC ramp time of less than 1 ms is
required.
2.
Do not float I/O pins during device operation. Floating
I/O pins can increase ICC as input buffers will draw
1-2 mA per floating input. In addition, when I/O pins are
floated, noise can propagate to the center of the CPLD.
I/O pins should be appropriately terminated with
bus-hold or pull-up. Unused I/Os can also be configured
as CGND (programmable GND).
3.
Do not drive I/O pins without VCC/VCCIO powered.
4.
Sink current when driving LEDs. Because all Xilinx
CPLDs have N-channel pull-down transistors on
outputs, it is required that an LED anode is sourced
through a resistor externally to VCC. Consequently, this
will give the brightest solution.
5.
Avoid pull-down resistors. Always use external pull-up
resistors if external termination is required. This is
because the CoolRunner-II Automotive CPLD, which
includes some I/O driving circuits beyond the input and
output buffers, may have contention with external pull-
down resistors, and, consequently, the I/O will not
switch as expected.
Figure 7: CP132 Chip Scale Package
CPG132
Bottom View
P
N
M
L
K
J
H
G
F
E
D
C
B
A
1
2
3
4
5
6
7
8
9
10
11
12
1
3
14
VCC
VCCIO1
GND
I/O
I/O(5)
I/O
VAUX
I/O
VCCIO1
I/O
GND
I/O
GND
I/O
VCCIO1
I/O
GND
I/O
I/O(2)
VCC
I/O
GND
NC
I/O
NC
I/O
I/O(2)
I/O(1)
VCCIO2
I/O
I/O(3)
I/O
GND
I/O
VCCIO2
VCC
I/O
GND
I/O
TDO
NC
I/O
GND
I/O(1)
I/O
NC
VCCIO2
I/O(1)
I/O
I/O(1)
NC
I/O
TDI
TCK
I/O
I/O(4)
GND
I/O
NC
I/O
GND
TMS
I/O
GND
I/O
I/O(2)
(1) - Global Output Enable
(2) - Global Clock
(3) - Global Set/Reset
(4) - Clock Divide Reset
(5) - DataGATE Enable
DS554_07_052109
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