參數(shù)資料
型號(hào): XC1701SO20I
廠商: Xilinx Inc
文件頁數(shù): 10/13頁
文件大小: 0K
描述: IC PROM SER I-TEMP 1K 20-SOIC
產(chǎn)品變化通告: XC1700 PROMs,XC5200,HQ,SCD Parts Discontinuation 19/Jul/2010
標(biāo)準(zhǔn)包裝: 37
可編程類型: OTP
存儲(chǔ)容量: 1Mb
電源電壓: 4.5 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 20-SOIC
包裝: 管件
XC1700E, XC1700EL, and XC1700L Series Configuration PROMs
DS027 (v3.5) June 25, 2008
Product Specification
6
R
X-Ref Target - Figure 2
Figure 2: Master Serial Mode
DIN
DOUT
CCLK
INIT
DONE
PROM
DATA
CLK
CE
FPGA
(Low Resets the Address Pointer)
VCC
OPTIONAL
Daisy-chained
FPGAs with
Different
configurations
OPTIONAL
Slave FPGAs
with Identical
Configurations
RESET
DS027_02_111606
CCLK
(Output)
DIN
DOUT
(Output)
OE/RESET
MODES(1)
VPP
Cascaded
Serial
Memory
DATA
CLK
CEO
OE/RESET
3.3V
4.7K
Ω
Notes:
1. For mode pin connections, refer to the appropriate FPGA data sheet.
2. The one-time-programmable PROM supports automatic loading of configuration programs.
3. Multiple devices can be cascaded to support additional FPGAs.
4. An early DONE inhibits the PROM data output one CCLK cycle before the FPGA I/Os become active.
Product Obsolete or Under Obsolescence
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