參數(shù)資料
型號: XC17S50AVOG8C
廠商: Xilinx Inc
文件頁數(shù): 6/8頁
文件大?。?/td> 0K
描述: IC PROM SERIAL 50K 8-SOIC
標準包裝: 98
可編程類型: OTP
存儲容量: 500kb
電源電壓: 3 V ~ 3.6 V
工作溫度: 0°C ~ 70°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-TSOP
包裝: 管件
Spartan-II/Spartan-IIE Family OTP Configuration PROMs (XC17S00A)
DS078 (v1.10) June 25, 2007
Product Specification
6
R
AC Characteristics Over Operating Condition(1)
Symbol
Description
Min
Max
Units
TOE
RESET/OE to Data Delay
45
ns
TCE
CE to Data Delay
60
ns
TCAC
CLK to Data Delay
80
ns
TOH
Data Hold From CE, RESET/OE, or CLK(2)
0–
ns
TDF
CE or RESET/OE to Data Float Delay(2,3)
–50
ns
TCYC
Clock Periods
100
ns
TLC
CLK Low Time(2)
50
ns
THC
CLK High Time(2)
50
ns
TSCE
CE Setup Time to CLK (to guarantee proper counting)
25
ns
THCE
CE Hold Time to CLK (to guarantee proper counting)
0
ns
THOE
RESET/OE Hold Time (guarantees counters are reset)
25
ns
TCEH
CE High time (guarantees counters are reset)
20
ns
Notes:
1.
AC test load = 50 pF
2.
Guaranteed by design, not tested.
3.
Float delays are measured with 5 pF AC loads. Transition is measured at ±200 mV from steady state active levels.
4.
All AC parameters are measured with VIL = 0.0V and VIH = 3.0V.
5.
If TCEH High < 2μs, TCE = 2 μs.
6.
If THOE High < 2μs, TCE = 2 μs.
RESET/OE
CE
CLK
DATA
TCE
TOE
TLC
TSCE
THCE
THOE
TCAC
TOH
TDF
TOH
THC
DS030_03_111502
TCYC
TCEH
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