參數(shù)資料
型號： XC17V16VQ44I
廠商： Xilinx Inc
文件頁數(shù)： 7/15頁
文件大?。?/td> 0K
描述： IC PROM SER I-TEMP 3.3V 44-VQFP
標準包裝： 160
可編程類型： OTP
存儲容量： 16Mb
電源電壓： 3 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-TQFP
供應商設備封裝： 44-VQFP（10x10）
包裝： 托盤
XC17V00 Series Configuration PROMs
DS073 (v2.0) April 7, 2014
Product Specification
15
R
— OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE — OBSOLETE —
Revision History
The following table shows the revision history for this document.
.
Notice of Disclaimer
THE XILINX HARDWARE FPGA AND CPLD DEVICES REFERRED TO HEREIN (“PRODUCTS”) ARE SUBJECT TO THE TERMS AND
CONDITIONS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED AT http://www.xilinx.com/warranty.htm. THIS LIMITED
WARRANTY DOES NOT EXTEND TO ANY USE OF PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE
SPECIFICATIONS STATED IN THE XILINX DATA SHEET. ALL SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE.
PRODUCTS ARE NOT DESIGNED OR INTENDED TO BE FAIL-SAFE OR FOR USE IN ANY APPLICATION REQUIRING FAIL-SAFE
PERFORMANCE, SUCH AS LIFE-SUPPORT OR SAFETY DEVICES OR SYSTEMS, OR ANY OTHER APPLICATION THAT INVOKES
THE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). USE OF PRODUCTS IN CRITICAL APPLICATIONS IS AT THE SOLE RISK OF CUSTOMER, SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
Date
Version
Revision
07/26/2000
1.0
Initial Xilinx release.
10/09/2000
1.1
Updated 20-pin PLCC Pinouts.
11/16/2000
1.2
Updated pinouts for XC17V16 and XC17V08, ICCA DC Characteristic from standby to active mode; CIN
and COUT from 10 pF to 15 pF, added ICCS for XC17V16 and XC17V08 at 500 μA.
02/20/2001
1.3
Added note to pinouts for “no connect,” updated Figure 3.
04/04/2001
1.4
Added XC2V products to Compatible PROM table, updated Figure 3, updated text for Virtex-II FPGAs.
10/09/2001
1.5
Corrected bitstream length for SCV405E, added power-on supply requirements and note for power-on
reset, updated configuration bits for Virtex-II devices, removed CF from Figure 3, and updated FPGA list.
02/27/2002
1.6
Added Virtex-II Pro FPGAs to the , page 6.
06/14/2002
1.7
Made additions and changes to Xilinx FPGAs and Compatible PROMs, page 6.
07/29/2002
1.8
Added Virtex-II Pro FPGAs to , page 6.
11/05/2002
1.9
Added pinout diagrams, changed , page 6, and added footnotes to AC Characteristics over Operating
04/10/2003
1.10
06/07/2007
1.11
Figure 2, page 2 updated to show correct three-state control on output data buses.
Corrected XC3S50 bitstream size in Xilinx FPGAs and Compatible PROMs, page 6.
Removed maximum soldering temperature (TSOL) from "Absolute Maximum Ratings(1)," page 10.
Refer to Xilinx Device Package User Guide for package soldering guidelines.
Added notes and updated timing diagram AC Characteristics over Operating Condition for XC17V16
and XC17V08, page 12 for clarification.
Reversed polarity of RESET/OE signal in timing diagram under , page 13 for consistency and added
notes for clarification.
11/13/2008
1.12
Added support for discontinued device and package combinations per XCN07010.
Updated Figure 3.
04/07/2014
2.0
This product is obsolete/discontinued per XCN12026.
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