XC18V00 Series In-System-Programmable Configuration PROMs
DS026 (v5.2) January 11, 2008
Product Specification
15
R
Customer Control Bits
The XC18V00 PROMs have various control bits accessible by the customer. These can be set after the array has been
programmed using “Skip User Array” in Xilinx iMPACT software. The iMPACT software can set these bits to enable the
optional JTAG read security, parallel configuration mode, or CF
Absolute Maximum Ratings(1,2)
Supply Voltage Requirements for Power-On Reset and Power-Down
Table 7: Truth Table for PROM Control Inputs
Control Inputs
Internal Address
Outputs
OE/RESET
CE
DATA
CEO
ICC
High
Low
If address < TC(1): increment
If address > TC(1): don’t change
Active
high-Z
High
Low
Active
reduced
Low
Held reset
High-Z
High
Active
High
Held reset
High-Z
High
Standby
Low
High
Held reset
High-Z
High
Standby
Notes:
1.
TC = Terminal Count = highest address value. TC + 1 = address 0.
Symbol
Description
Value
Units
VCCINT/VCCO
Supply voltage relative to GND
–0.5 to +4.0
V
VIN
Input voltage with respect to GND
–0.5 to +5.5
V
VTS
Voltage applied to high-Z output
–0.5 to +5.5
V
TSTG
Storage temperature (ambient)
–65 to +150
° C
TJ
Junction temperature
+125
° C
Notes:
1.
Maximum DC undershoot below GND must be limited to either 0.5V or 10 mA, whichever is easier to achieve. During transitions, the device
pins can undershoot to –2.0V or overshoot to +7.0V, provided this over- or undershoot lasts less then 10 ns and with the forcing current being
limited to 200 mA.
2.
Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied.
Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability.
Symbol
Description
Min
Max
Units
TVCC
VCCINT rise time from 0V to nominal voltage(2)
0.2
50
ms
VCCPOR
POR threshold for the VCCINT supply
1
–
V
TOER
OE/RESET release delay following POR(3)
01
ms
TRST
Time required to trigger a device reset when the VCCINT supply drops
below the maximum VCCPD threshold
10
–
ms
VCCPD
Power-down threshold for VCCINT supply
-
1
V
Notes:
1.
VCCINT and VCCO supplies can be applied in any order.
2.
At power up, the device requires the VCCINT power supply to rise monotonically to the nominal operating voltage within the specified TVCC rise
time. If the power supply cannot meet this requirement, then the device might not perform power-on-reset properly. See
Figure 9, page 14.
3.
If the VCCINT and VCCO supplies do not reach their respective recommended operating conditions before the OE/RESET pin is released,
then the configuration data from the PROM will not be available at the recommended threshold levels. The configuration sequence must be
delayed until both VCCINT and VCCO have reached their recommended operating conditions.
4.
Typical POR is value is 2.0V.