參數(shù)資料
型號: XC18V512PCG20C
廠商: Xilinx Inc
文件頁數(shù): 13/24頁
文件大小: 0K
描述: IC PROM REPROGR 512KB 20-PLCC
標(biāo)準(zhǔn)包裝: 46
可編程類型: 系統(tǒng)內(nèi)可編程
存儲容量: 512kb
電源電壓: 3 V ~ 3.6 V
工作溫度: 0°C ~ 70°C
封裝/外殼: 20-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 20-PLCC
包裝: 管件
XC18V00 Series In-System-Programmable Configuration PROMs
DS026 (v5.2) January 11, 2008
Product Specification
20
R
AC Characteristics Over Operating Conditions When Cascading for XC18V01 and
XC18V512
CLK
DATA
CE
CEO
First Bit
Last Bit
TCDF
DS026_07_020300
OE/RESET
TOCK
TOOE
TOCE
Symbol
Description
Min
Max
Units
TCDF
CLK to data float delay(2,3)
–25
ns
TOCK
CLK to CEO delay(3)
–20
ns
TOCE
CE to CEO delay(3)
–20
ns
TOOE
OE/RESET to CEO delay(3)
–20
ns
Notes:
1.
AC test load = 50 pF.
2.
Float delays are measured with 5 pF AC loads. Transition is measured at ±200 mV from steady state active levels.
3.
Guaranteed by design, not tested.
4.
All AC parameters are measured with VIL = 0.0V and VIH = 3.0V.
5.
For cascade mode:
TCYC min = TOCK + TCE + FPGA DIN-to-CCLK setup time
TCAC min = TOCK + TCE
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