參數(shù)資料
型號(hào): XC2S600E-6FG676I
英文描述: FPGA
中文描述: FPGA的
文件頁數(shù): 14/21頁
文件大小: 183K
代理商: XC2S600E-6FG676I
Spartan-IIE 1.8V FPGA Family: DC and Switching Characteristics
14
www.xilinx.com
1-800-255-7778
DS077-3 (v2.0) November 18, 2002
Product Specification
R
Figure 1:
Period Tolerance and Clock Jitter
Period Tolerance:
the allowed input clock period change in nanoseconds.
Output Jitter:
the difference between an ideal
reference clock edge and the actual design.
TCLKIN+ TIPTOL
_
DS077_52_071201
Actual Period
+
+/- Jitter
+ Maximum
Phase Difference
Phase Offset and Maximum Phase Difference
+ Phase Offset
Ideal Period
1
FCLKIN
TCLKIN
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