Virtex-II Platform FPGAs: DC and Switching Characteristics
R
DS031-3 (v3.5) November 5, 2007
Module 3 of 4
Product Specification
11
IOB Input Switching Characteristics Standard Adjustments
Table 15 gives all standard-specific data input delay adjustments.
Table 15: IOB Input Switching Characteristics Standard Adjustments
Description
IOSTANDARD
Attribute
Timing
Parameter
Speed Grade
Units
-6
-5
-4
LVTTL (Low-Voltage Transistor-Transistor Logic)
LVTTL
TILVTTL
0.00
ns
LVCMOS (Low-Voltage CMOS ), 3.3V
LVCMOS33
TILVCMOS33
0.00
ns
LVCMOS, 2.5V
LVCMOS25
TILVCMOS25
0.11
0.12
ns
LVCMOS, 1.8V
LVCMOS18
TILVCMOS18
0.42
0.43
0.49
ns
LVCMOS, 1.5V
LVCMOS15
TILVCMOS15
0.98
1.00
1.15
ns
LVDS (Low-Voltage Differential Signaling), 2.5V
LVDS_25
TILVDS_25
0.60
0.69
ns
LVDS, 3.3V
LVDS_33
TILVDS_33
0.60
0.69
ns
LVDSEXT (Extended Mode), 2.5V
LVDSEXT_25
TILVDSEXT_25
0.68
0.69
0.79
ns
LVDSEXT, 3.3V
LVDSEXT_33
TILVDSEXT_33
0.56
0.65
ns
ULVDS (Ultra LVDS), 2.5V
ULVDS_25
TIULVDS_25
0.48
0.49
0.56
ns
BLVDS (Bus LVDS), 2.5V
BLVDS_25
TIBLVDS_25
0.68
0.69
0.79
ns
LDT (HyperTransport), 2.5V
LDT_25
TILDT_25
0.48
0.49
0.56
ns
LVPECL (Low-Voltage Positive Electron-Coupled Logic), 3.3V
LVPECL_33
TILVPECL_33
0.60
0.69
ns
PCI (Peripheral Component Interface), 33 MHz, 3.3V
PCI33_3
TIPCI33_3
0.00
ns
PCI, 66 MHz, 3.3V
PCI66_3
TIPCI66_3
0.00
ns
PCI-X, 133 MHz, 3.3V
PCIX
TIPCIX
0.00
ns
GTL (Gunning Transceiver Logic)
GTL
TIGTL
0.42
0.48
ns
GTL Plus
GTLP
TIGTLP
0.42
0.48
ns
HSTL (High-Speed Transceiver Logic), Class I
HSTL_I
TIHSTL_I
0.42
0.48
ns
HSTL, Class II
HSTL_II
TIHSTL_II
0.42
0.48
ns
HSTL, Class III
HSTL_III
TIHSTL_III
0.42
0.48
ns
HSTL, Class IV
HSTL_IV
TIHSTL_IV
0.42
0.48
ns
HSTL, Class I, 1.8V
HSTL_I_18
TIHSTL_I_18
0.42
0.48
ns
HSTL, Class II, 1.8V
HSTL_II_18
TIHSTL_II_18
0.42
0.48
ns
HSTL, Class III, 1.8V
HSTL_III_18
TIHSTL_III_18
0.42
0.48
ns
HSTL, Class IV, 1.8V
HSTL_IV_18
TIHSTL_IV_18
0.42
0.48
ns
SSTL (Stub Series Terminated Logic), Class I, 1.8V
SSTL18_I
TISSTL18_I
0.42
0.48
ns
SSTL, Class II, 1.8V
SSTL18_II
TISSTL18_II
0.42
0.48
ns
SSTL, Class I, 2.5V
SSTL2_I
TISSTL2_I
0.42
0.48
ns
SSTL, Class II, 2.5V
SSTL2_II
TISSTL2_II
0.42
0.48
ns
SSTL, Class I, 3.3V
SSTL3_I
TISSTL3_I
0.35
0.40
ns
SSTL, Class II, 3.3V
SSTL3_ II
TISSTL3_II
0.35
0.40
ns
AGP-2X/AGP (Accelerated Graphics Port)
AGP
TIAGP
0.35
0.40
ns
LVDCI (Low-Voltage Digitally Controlled Impedance), 3.3V
LVDCI_33
TILVDCI_33
0.00
ns
LVDCI, 2.5V
LVDCI_25
TILVDCI_25
0.11
0.12
ns
LVDCI, 1.8V
LVDCI_18
TILVDCI_18
0.42
0.43
0.49
ns
LVDCI, 1.5V
LVDCI_15
TILVDCI_15
0.98
1.00
1.14
ns