參數(shù)資料
型號(hào)： XC3000ASERIES
廠商： Xilinx, Inc.
英文描述： Field Programmable Gate Arrays
中文描述： 現(xiàn)場(chǎng)可編程門(mén)陣列
文件頁(yè)數(shù)： 6/76頁(yè)
文件大?。?/td> 731K
代理商： XC3000ASERIES
R
XC3000 Series Field Programmable Gate Arrays
7-16
November 9, 1998 (Version 3.1)
Figure 15: Programmable Interconnection of Longlines. This is provided at the edges of the routing area.
Three-state buffers allow the use of horizontal Longlines to form on-chip wired AND and multiplexed buses. The left two
non-clock vertical Longlines per column (except XC3020A) and the outer perimeter Longlines may be programmed as
connectable half-length lines.
VCC
DA
DB
DC
DN
VCC
Z = DA DB DC ... DN
X3036
(LOW)
Figure 16: 3-State Buffers Implement a Wired-AND Function. When all the buffer 3-state lines are High, (high
impedance), the pull-up resistor(s) provide the High output. The buffer inputs are driven by the control signals or a Low.
D A
A
D B
B
D C
C
D N
N
D A A
+
=D B B
+ D C C
+
D N N
Z… +
X1741A
WEAK
KEEPER CIRCUIT
Figure 17: 3-State Buffers Implement a Multiplexer. The selection is accomplished by the buffer 3-state signal.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XC3000FM 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Logic Cell Array Families
XC3000L 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)
XC3000LSERIES 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Field Programmable Gate Arrays
XC3020 制造商:XILINX 制造商全稱(chēng):XILINX 功能描述:Logic Cell Array Families
XC3020-100CB100B 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Field Programmable Gate Array (FPGA)
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