參數資料
型號: XC4005XL-1PQ160I
廠商: Xilinx Inc
文件頁數: 4/68頁
文件大小: 0K
描述: IC FPGA I-TEMP 3.3V 1SPD 160PQFP
產品變化通告: Product Discontinuation 27/Apr/2010
標準包裝: 1
系列: XC4000E/X
LAB/CLB數: 196
邏輯元件/單元數: 466
RAM 位總計: 6272
輸入/輸出數: 112
門數: 5000
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 160-BQFP
供應商設備封裝: 160-PQFP(28x28)
R
XC4000E and XC4000X Series Field Programmable Gate Arrays
6-16
May 14, 1999 (Version 1.6)
Figure 8 shows the write timing for level-sensitive, sin-
gle-port RAM.
The relationships between CLB pins and RAM inputs and
outputs for single-port level-sensitive mode are shown in
Figure 9 and Figure 10 show block diagrams of a CLB con-
gured as 16x2 and 32x1 level-sensitive, single-port RAM.
Initializing RAM at Conguration
Both RAM and ROM implementations of the XC4000
Series devices are initialized during conguration. The ini-
tial contents are dened via an INIT attribute or property
attached to the RAM or ROM symbol, as described in the
schematic library guide. If not dened, all RAM contents
are initialized to all zeros, by default.
RAM initialization occurs only during conguration. The
RAM content is not affected by Global Set/Reset.
Table 7: Single-Port Level-Sensitive RAM Signals
G'
G1 G4
F1 F4
WRITE
DECODER
1 of 16
DIN
16-LATCH
ARRAY
X6748
4
MUX
F'
WRITE
DECODER
1 of 16
DIN
16-LATCH
ARRAY
READ
ADDRESS
READ
ADDRESS
WRITE PULSE
LATCH
ENABLE
LATCH
ENABLE
K
(CLOCK)
WRITE PULSE
MUX
4
C1 C4
4
WE
D1
D0
EC
Figure 7: 16x1 Edge-Triggered Dual-Port RAM
RAM Signal
CLB Pin
Function
D
D0 or D1
Data In
A[3:0]
F1-F4 or G1-G4
Address
WE
Write Enable
O
F’ or G’
Data Out
WC
T
ADDRESS
WRITE ENABLE
DATA IN
AS
T
WP
T
DS
T
DH
T
REQUIRED
AH
T
X6462
Figure 8: Level-Sensitive RAM Write Timing
Product Obsolete or Under Obsolescence
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XC4005XL-1PQ160M 制造商:XILINX 制造商全稱:XILINX 功能描述:XC4000E and XC4000X Series Field Programmable Gate Arrays
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XC4005XL-1PQ208I 功能描述:IC FPGA I-TEMP 3.3V 1SPD 208PQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現場可編程門陣列) 系列:XC4000E/X 標準包裝:1 系列:Kintex-7 LAB/CLB數:25475 邏輯元件/單元數:326080 RAM 位總計:16404480 輸入/輸出數:350 門數:- 電源電壓:0.97 V ~ 1.03 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:900-BBGA,FCBGA 供應商設備封裝:900-FCBGA(31x31) 其它名稱:122-1789
XC4005XL-1PQ208M 制造商:XILINX 制造商全稱:XILINX 功能描述:XC4000E and XC4000X Series Field Programmable Gate Arrays
XC4005XL-1TQ144C 功能描述:IC FPGA C-TEMP 3.3V 1SPD 144TQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現場可編程門陣列) 系列:XC4000E/X 標準包裝:1 系列:Kintex-7 LAB/CLB數:25475 邏輯元件/單元數:326080 RAM 位總計:16404480 輸入/輸出數:350 門數:- 電源電壓:0.97 V ~ 1.03 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:900-BBGA,FCBGA 供應商設備封裝:900-FCBGA(31x31) 其它名稱:122-1789