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| 型號： | XC4036XL-1HQ208C |
| 廠商： | Xilinx Inc |
| 文件頁數(shù)： | 23/68頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA C-TEMP 3.3V 1SPD 208HQFP |
| 產(chǎn)品變化通告： | XC4000(XL,XLA,E) Discontinuation 15/Nov/2004 |
| 標(biāo)準(zhǔn)包裝： | 24 |
| 系列： | XC4000E/X |
| LAB/CLB數(shù)： | 1296 |
| 邏輯元件/單元數(shù)： | 3078 |
| RAM 位總計： | 41472 |
| 輸入/輸出數(shù)： | 160 |
| 門數(shù)： | 36000 |
| 電源電壓： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | 0°C ~ 85°C |
| 封裝/外殼： | 208-BFQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 208-PQFP（28x28） |
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R
XC4000E and XC4000X Series Field Programmable Gate Arrays
6-6
May 14, 1999 (Version 1.6)
* Max values of Typical Gate Range include 20-30% of CLBs used as RAM.
Note:
All functionality in low-voltage families is the same as
in the corresponding 5-Volt family, except where numerical
references are made to timing or power.
Description
XC4000 Series devices are implemented with a regular,
exible, programmable architecture of Congurable Logic
Blocks (CLBs), interconnected by a powerful hierarchy of
versatile routing resources, and surrounded by a perimeter
of programmable Input/Output Blocks (IOBs). They have
generous routing resources to accommodate the most
complex interconnect patterns.
The devices are customized by loading conguration data
into internal memory cells. The FPGA can either actively
read its conguration data from an external serial or
byte-parallel PROM (master modes), or the conguration
data can be written into the FPGA from an external device
(slave and peripheral modes).
XC4000 Series FPGAs are supported by powerful and
sophisticated software, covering every aspect of design
from schematic or behavioral entry, oor planning, simula-
tion, automatic block placement and routing of intercon-
nects, to the creation, downloading, and readback of the
conguration bit stream.
Because Xilinx FPGAs can be reprogrammed an unlimited
number of times, they can be used in innovative designs
where hardware is changed dynamically, or where hard-
ware must be adapted to different user applications.
FPGAs are ideal for shortening design and development
cycles, and also offer a cost-effective solution for produc-
tion rates well beyond 5,000 systems per month.
Taking Advantage of Re-conguration
FPGA devices can be re-congured to change logic func-
tion while resident in the system. This capability gives the
system designer a new degree of freedom not available
with any other type of logic.
Hardware can be changed as easily as software. Design
updates or modications are easy, and can be made to
products already in the eld. An FPGA can even be re-con-
gured dynamically to perform different functions at differ-
ent times.
Re-congurable logic can be used to implement system
self-diagnostics, create systems capable of being re-con-
gured for different environments or operations, or imple-
ment multi-purpose hardware for a given application. As an
added benet, using re-congurable FPGA devices simpli-
es hardware design and debugging and shortens product
time-to-market.
Table 1: XC4000E and XC4000X Series Field Programmable Gate Arrays
Device
Logic
Cells
Max Logic
Gates
(No RAM)
Max. RAM
Bits
(No Logic)
Typical
Gate Range
(Logic and RAM)*
CLB
Matrix
Total
CLBs
Number
of
Flip-Flops
Max.
User I/O
XC4002XL
152
1,600
2,048
1,000 - 3,000
8 x 8
64
256
64
XC4003E
238
3,000
3,200
2,000 - 5,000
10 x 10
100
360
80
XC4005E/XL
466
5,000
6,272
3,000 - 9,000
14 x 14
196
616
112
XC4006E
608
6,000
8,192
4,000 - 12,000
16 x 16
256
768
128
XC4008E
770
8,000
10,368
6,000 - 15,000
18 x 18
324
936
144
XC4010E/XL
950
10,000
12,800
7,000 - 20,000
20 x 20
400
1,120
160
XC4013E/XL
1368
13,000
18,432
10,000 - 30,000
24 x 24
576
1,536
192
XC4020E/XL
1862
20,000
25,088
13,000 - 40,000
28 x 28
784
2,016
224
XC4025E
2432
25,000
32,768
15,000 - 45,000
32 x 32
1,024
2,560
256
XC4028EX/XL
2432
28,000
32,768
18,000 - 50,000
32 x 32
1,024
2,560
256
XC4036EX/XL
3078
36,000
41,472
22,000 - 65,000
36 x 36
1,296
3,168
288
XC4044XL
3800
44,000
51,200
27,000 - 80,000
40 x 40
1,600
3,840
320
XC4052XL
4598
52,000
61,952
33,000 - 100,000
44 x 44
1,936
4,576
352
XC4062XL
5472
62,000
73,728
40,000 - 130,000
48 x 48
2,304
5,376
384
XC4085XL
7448
85,000
100,352
55,000 - 180,000
56 x 56
3,136
7,168
448
Product Obsolete or Under Obsolescence
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| XC4036XL-1HQ208I | 功能描述:IC FPGA I-TEMP 3.3V 1SPD 208HQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:XC4000E/X 標(biāo)準(zhǔn)包裝:1 系列:Kintex-7 LAB/CLB數(shù):25475 邏輯元件/單元數(shù):326080 RAM 位總計:16404480 輸入/輸出數(shù):350 門數(shù):- 電源電壓:0.97 V ~ 1.03 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:900-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:900-FCBGA（31x31） 其它名稱:122-1789 |
| XC4036XL-1HQ240C | 功能描述:IC FPGA 1296 CLB'S 240-HQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:XC4000E/X 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計:3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA（34.55x34.55） |
| XC4036XL-1HQ240I | 功能描述:IC FPGA I-TEMP 3.3V 1SPD 240HQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:XC4000E/X 標(biāo)準(zhǔn)包裝:1 系列:Kintex-7 LAB/CLB數(shù):25475 邏輯元件/單元數(shù):326080 RAM 位總計:16404480 輸入/輸出數(shù):350 門數(shù):- 電源電壓:0.97 V ~ 1.03 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:900-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:900-FCBGA（31x31） 其它名稱:122-1789 |
| XC4036XL-1HQ304C | 功能描述:IC FPGA C-TEMP 3.3V 1SPD 304HQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:XC4000E/X 標(biāo)準(zhǔn)包裝:1 系列:Kintex-7 LAB/CLB數(shù):25475 邏輯元件/單元數(shù):326080 RAM 位總計:16404480 輸入/輸出數(shù):350 門數(shù):- 電源電壓:0.97 V ~ 1.03 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:900-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:900-FCBGA（31x31） 其它名稱:122-1789 |
| XC4036XL-1HQ304I | 功能描述:IC FPGA I-TEMP 3.3V 1SPD 304HQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:XC4000E/X 標(biāo)準(zhǔn)包裝:1 系列:Kintex-7 LAB/CLB數(shù):25475 邏輯元件/單元數(shù):326080 RAM 位總計:16404480 輸入/輸出數(shù):350 門數(shù):- 電源電壓:0.97 V ~ 1.03 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:900-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:900-FCBGA（31x31） 其它名稱:122-1789 |
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