R
May 14, 1999 (Version 1.6)
6-21
XC4000E and XC4000X Series Field Programmable Gate Arrays
6
Q
Flip-
Flop/
Latch
D
CE
Q
Out
T
Output
Clock
I
Input
Clock
Enable
Delay
Pad
Flip-Flop
Slew Rate
Control
Output
Buffer
Input
Buffer
Passive
Pull-Up/
Pull-Down
2
I1
X6704
Figure 15: Simplied Block Diagram of XC4000E IOB
Q
Flip-Flop/
Latch
Fast
Capture
Latch
D
Q
Latch
D
G
D
0
1
CE
Q
Out
T
Output Clock
I
Input Clock
Clock Enable
Pad
Flip-Flop
Slew Rate
Control
Output
Buffer
Output MUX
Input
Buffer
Passive
Pull-Up/
Pull-Down
2
I1
X5984
Delay
Figure 16: Simplied Block Diagram of XC4000X IOB (shaded areas indicate differences from XC4000E)
Product Obsolete or Under Obsolescence