參數(shù)資料
型號(hào): XC4VLX100-10FFG1513C
廠商: Xilinx Inc
文件頁(yè)數(shù): 48/58頁(yè)
文件大?。?/td> 0K
描述: IC FPGA VIRTEX-4 100K 1513-FBGA
標(biāo)準(zhǔn)包裝: 1
系列: Virtex®-4 LX
LAB/CLB數(shù): 12288
邏輯元件/單元數(shù): 110592
RAM 位總計(jì): 4423680
輸入/輸出數(shù): 960
電源電壓: 1.14 V ~ 1.26 V
安裝類(lèi)型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 1513-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 1513-FCBGA(40x40)
其它名稱(chēng): 122-1487
Virtex-4 FPGA Data Sheet: DC and Switching Characteristics
DS302 (v3.7) September 9, 2009
Product Specification
52
Current Virtex-4 Production Devices
Table 64 summarizes the current production LX and SX device stepping.
Table 65 summarizes the current production FX device stepping.
Table 64: Current LX and SX Production Devices
LX/SX Device Stepping
Step 1
Step 2
Example Ordering Code
XC4VLX60-10FF672C
XC4VLX60-10FF672CS2
Device steppings shipped when
ordered per Example Ordering
Step 1 or Step 2
Step 2
Capability Improvements(1)
The DFS macro is no
longer needed
TCONFIG requirement is removed
DCM_RESET requirement is removed
DCM_INPUT_CLOCK_STOP requirement is
removed by a macro (automatically inserted by ISE
software)
CONFIG STEPPING parameter
(must be set in UCF file)
“1”
“2”
Minimum Software Required
ISE 7.1i SP4
Minimum Speed Specification
Required.
1.58
Notes:
1.
See LX and SX Errata for details on LX and SX Step 1 and ES silicon.
Table 65: Current FX Production Devices
FX Device Stepping
Step 0
Step 1
Example Ordering Code
XC4VFX60-10FF1152C
XC4VFX60-10FF1152CS1
Device steppings shipped when
ordered per Example Ordering
Step 0 or Step 1
Step 1
Capability Improvements
See FX Errata for details
CONFIG STEPPING parameter
(must be set in UCF file)
“0”
“0” or “1”
Minimum Software Required
ISE 8.1i SP2
Minimum Speed Specification
Required
1.58
Notes:
1.
Speed Specification v1.65 or later must be used for XC4VFX40 devices (all speed grades) and for XC4VFX100 (-12 speed grade only). In this case,
these family members (and speed grades) are released to production before a speed specification is released with the correct label (Advance,
Preliminary, or Production). These labeling discrepancies will be corrected in a subsequent speed specification release.
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