參數資料
| 型號： | XC5VLX20T-1FF323I |
| 廠商： | Xilinx Inc |
| 文件頁數： | 4/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA VIRTEX-5LXT 323FFBGA |
| 標準包裝： | 84 |
| 系列： | Virtex®-5 LXT |
| LAB/CLB數： | 1560 |
| 邏輯元件/單元數： | 19968 |
| RAM 位總計： | 958464 |
| 輸入/輸出數： | 172 |
| 電源電壓： | 0.95 V ~ 1.05 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | -40°C ~ 100°C |
| 封裝/外殼： | 323-BBGA，FCBGA |
| 供應商設備封裝： | 323-FCBGA |
| 配用： | 568-5088-ND - BOARD DEMO DAC1408D750 |
Virtex-5 Family Overview
12
DS100 (v5.0) February 6, 2009
Product Specification
R
Virtex-5 FPGA Ordering Information
Virtex-5 FPGA ordering information shown in Figure 1 applies to all packages including Pb-Free.
Revision History
The following table shows the revision history for this document.
X-Ref Target - Figure 1
Figure 1: Virtex-5 FPGA Ordering Information
Date
Version
Revision
04/14/06
1.0
Initial Xilinx release.
05/12/06
1.1
First version posted to the Xilinx website. Minor typographical edits and description updates to highlight
new features. Removed LUT utilization bullet from "Virtex-5 FPGA Logic," page 3.
09/06/06
2.0
Added LXT platform to entire document. This includes descriptions of the RocketIO GTP transceivers,
the Ethernet MACs, and the PCI Express Endpoint block.
10/12/06
2.1
Added LX85T devices. Added System Monitor descriptions and functionality.
12/28/06
2.2
Added LX220T devices. Revised the Total I/O banks for the LX330 in Table 1. Revised the
XC5VLX50T-FFG665 example in Figure 1. Clarified support for "Differential SSTL 1.8V and 2.5V
02/02/07
3.0
Added the SXT platform to entire document.
05/23/07
3.1
Removed support for IEEE 1149.6
09/04/07
3.2
Revised maximum line rate from 3.2 Gb/s to 3.75 Gb/s in entire document.
12/11/07
3.3
Added LX20T, LX155T, and LX155 devices.
12/17/07
3.4
Added Disclaimer. Revised CMT section on page 3. Clarified "Virtex-5 FPGA LogiCORE Endpoint
03/31/08
4.0
Added FXT platform to entire document.
Clarified information in the following sections: "Integrated Endpoint Block for PCI Express Compliance"
To avoid confusion with PLL functionality, removed PMCD references in "Global Clocking," page 8.
04/25/08
4.1
Added XC5VSX240T to entire document.
05/07/08
4.2
Updated throughout data sheet that the RocketIO GTX transceivers are designed to run from 150 Mb/s
to 6.5 Gb/s.
Clarified PPC440MC_DDR2 memory controller on page 5.
06/18/08
4.3
Revised Ethernet MAC column in Table 1, page 2 and added Note 5. Also updated "Tri-Mode
09/23/08
4.4
Added TXT platform to entire document.
Revised RocketIO GTX transciever datapath support on page 10.
02/6/09
5.0
Changed document classification to Product Specification from Advance Product Specification.
Example: XC5VLX50T-1FFG665C
Device Type
Temperature Range:
C = Commercial (TJ = 0°C to +85°C)
I = Industrial (TJ = –40°C to +100°C)
Number of Pins
Package Type
Speed Grade
(-1, -2, -3(1))
Pb-Free
DS100_01_111006
Note:
1) -3 speed grade is not available in all devices
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相關代理商/技術參數 |
參數描述 |
|---|---|
| XC5VLX20T-1FFG323C | 功能描述:IC FPGA VIRTEX-5LX 20K 323-FCBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現場可編程門陣列） 系列:Virtex®-5 LXT 產品變化通告:Step Intro and Pkg Change 11/March/2008 標準包裝:1 系列:Virtex®-5 SXT LAB/CLB數:4080 邏輯元件/單元數:52224 RAM 位總計:4866048 輸入/輸出數:480 門數:- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，FCBGA 供應商設備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
| XC5VLX20T-1FFG323CES | 制造商:Xilinx 功能描述: |
| XC5VLX20T-1FFG323I | 功能描述:IC FPGA VIRTEX-5LX 20K 323-FCBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現場可編程門陣列） 系列:Virtex®-5 LXT 產品變化通告:Step Intro and Pkg Change 11/March/2008 標準包裝:1 系列:Virtex®-5 SXT LAB/CLB數:4080 邏輯元件/單元數:52224 RAM 位總計:4866048 輸入/輸出數:480 門數:- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，FCBGA 供應商設備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5 |
| XC5VLX20T-1FFG665C | 制造商:Xilinx 功能描述: |
| XC5VLX20T-2FF323C | 制造商:Xilinx 功能描述:FPGA VIRTEX-5 65NM 1V 323FCFBGA - Trays 制造商:Xilinx 功能描述:IC FPGA 172 I/O 323FCBGA 制造商:Xilinx 功能描述:IC FPGA VIRTEX5LX 20K 323-FCBGA |
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