參數(shù)資料
型號(hào): XC5VLX30-3FFG676C
廠商: Xilinx Inc
文件頁(yè)數(shù): 75/91頁(yè)
文件大?。?/td> 0K
描述: IC FPGA VIRTEX-5 30K 676FBGA
標(biāo)準(zhǔn)包裝: 1
系列: Virtex®-5 LX
LAB/CLB數(shù): 2400
邏輯元件/單元數(shù): 30720
RAM 位總計(jì): 1179648
輸入/輸出數(shù): 400
電源電壓: 0.95 V ~ 1.05 V
安裝類(lèi)型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 676-BBGA,F(xiàn)CBGA
供應(yīng)商設(shè)備封裝: 676-FCBGA(27x27)
配用: 568-5088-ND - BOARD DEMO DAC1408D750
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
DS202 (v5.3) May 5, 2010
Product Specification
77
Table 95: Global Clock Setup and Hold With PLL in Source-Synchronous Mode
Symbol
Description
Device
Speed Grade
Units
-3
-2
-1
Input Setup and Hold Time Relative to Global Clock Input Signal for LVCMOS25 Standard.(1)
TPSPLL0/ TPHPLL0
No Delay Global Clock and IFF(2) with PLL in
Source-Synchronous Mode
XC5VLX20T
N/A
–0.26
1.21
–0.25
1.40
ns
XC5VLX30
–0.33
1.13
–0.33
1.22
–0.33
1.34
ns
XC5VLX30T
–0.33
1.13
–0.33
1.22
–0.33
1.34
ns
XC5VLX50
–0.24
1.21
–0.24
1.30
–0.23
1.42
ns
XC5VLX50T
–0.24
1.21
–0.24
1.30
–0.23
1.42
ns
XC5VLX85
–0.25
1.23
–0.23
1.30
–0.22
1.39
ns
XC5VLX85T
–0.25
1.23
–0.23
1.30
–0.22
1.39
ns
XC5VLX110
–0.26
1.27
–0.24
1.34
–0.23
1.43
ns
XC5VLX110T
–0.26
1.27
–0.25
1.34
–0.23
1.43
ns
XC5VLX155
–0.15
1.48
–0.12
1.56
–0.10
1.67
ns
XC5VLX155T
–0.16
1.48
–0.12
1.56
–0.10
1.67
ns
XC5VLX220
N/A
–0.34
1.75
–0.30
1.80
ns
XC5VLX220T
N/A
–0.34
1.75
–0.31
1.80
ns
XC5VLX330
N/A
–0.34
1.90
–0.30
1.95
ns
XC5VLX330T
N/A
–0.34
1.90
–0.30
1.95
ns
XC5VSX35T
–0.19
1.36
–0.18
1.44
–0.16
1.54
ns
XC5VSX50T
–0.27
1.37
–0.26
1.44
–0.25
1.53
ns
XC5VSX95T
N/A
–0.26
1.58
–0.24
1.65
ns
XC5VSX240T
N/A
–0.35
1.97
–0.31
2.02
ns
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