參數(shù)資料
型號: XC5VLX50-1FFG1153C
廠商: Xilinx Inc
文件頁數(shù): 12/91頁
文件大?。?/td> 0K
描述: IC FPGA VIRTEX-5 50K 1153FBGA
標準包裝: 1
系列: Virtex®-5 LX
LAB/CLB數(shù): 3600
邏輯元件/單元數(shù): 46080
RAM 位總計: 1769472
輸入/輸出數(shù): 560
電源電壓: 0.95 V ~ 1.05 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 1153-BBGA,F(xiàn)CBGA
供應商設備封裝: 1153-FCBGA(35x35)
配用: 568-5088-ND - BOARD DEMO DAC1408D750
HW-V5-ML561-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5
HW-V5-ML550-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5
HW-V5-ML521-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5
HW-V5GBE-DK-UNI-G-ND - KIT DEV V5 LXT GIGABIT ETHERNET
122-1508-ND - EVALUATION PLATFORM VIRTEX-5
其它名稱: 122-1561
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
DS202 (v5.3) May 5, 2010
Product Specification
2
Table 2: Recommended Operating Conditions
Symbol
Description
Temperature Range
Min
Max
Units
VCCINT
Internal supply voltage relative to GND, TJ =0°C to +85°C
Commercial
0.95
1.05
V
Internal supply voltage relative to GND, TJ = –40°C to +100°C
Industrial
0.95
1.05
V
VCCAUX(1)
Auxiliary supply voltage relative to GND, TJ =0°C to +85°C
Commercial
2.375
2.625
V
Auxiliary supply voltage relative to GND, TJ =–40°C to +100°C
Industrial
2.375
2.625
V
VCCO(2,4,5)
Supply voltage relative to GND, TJ =0°C to +85°C
Commercial
1.14
3.45
V
Supply voltage relative to GND, TJ =–40°C to +100°C
Industrial
1.14
3.45
V
VIN
3.3V supply voltage relative to GND, TJ =0°C to +85°C
Commercial
GND – 0.20
3.45
V
3.3V supply voltage relative to GND, TJ = –40°C to +100°C
Industrial
GND – 0.20
3.45
V
2.5V and below supply voltage relative to GND,
TJ =0°C to +85°C
Commercial
GND – 0.20
VCCO + 0.2
V
2.5V and below supply voltage relative to GND,
TJ = –40°C to +100°C
Industrial
GND – 0.20
VCCO + 0.2
V
IIN(6)
Maximum current through any pin in a powered or unpowered
bank when forward biasing the clamp diode
Commercial
10
mA
Industrial
10
mA
VBATT(3)
Battery voltage relative to GND, TJ =0°C to +85°C
Commercial
1.0
3.6
V
Battery voltage relative to GND, TJ =–40°C to +100°C
Industrial
1.0
3.6
V
Notes:
1.
Recommended maximum voltage drop for VCCAUX is 10 mV/ms.
2.
Configuration data is retained even if VCCO drops to 0V.
3.
VBATT is required only when using bitstream encryption. If battery is not used, connect VBATT to either ground or VCCAUX.
4.
Includes VCCO of 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V.
5.
The configuration supply voltage VCC_CONFIG is also known as VCCO_0.
6.
A total of 100 mA per bank should not be exceeded.
Table 3: DC Characteristics Over Recommended Operating Conditions
Symbol
Description
Data Rate
Min
Typ
Max
Units
VDRINT
Data retention VCCINT voltage (below which configuration data might be lost)
0.75
V
VDRI
Data retention VCCAUX voltage (below which configuration data might be lost)
2.0
V
IREF
VREF leakage current per pin
10
A
IL
Input or output leakage current per pin (sample-tested)
10
A
CIN
Input capacitance (sample-tested)
8pF
IRPU(1)
Pad pull-up (when selected) @ VIN =0V, VCCO =3.3V
20
150
A
Pad pull-up (when selected) @ VIN =0V, VCCO =2.5V
10
90
A
Pad pull-up (when selected) @ VIN =0V, VCCO = 1.8V
5
45
A
Pad pull-up (when selected) @ VIN =0V, VCCO = 1.5V
3
30
A
Pad pull-up (when selected) @ VIN =0V, VCCO = 1.2V
2
15
A
IRPD(1)
Pad pull-down (when selected) @ VIN =2.5V
5
110
A
IBATT(2)
Battery supply current
150
nA
n
Temperature diode ideality factor
1.0002
n
r
Series resistance
5.0
Ω
Notes:
1.
Typical values are specified at nominal voltage, 25°C.
2.
Maximum value specified for worst case process at 25°C.
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