參數(shù)資料
型號: XC6401GG50DMR
廠商: TOREX SEMICONDUCTOR LTD.
英文描述: Dual LDO Regulators Low ESR Cap Compatible
中文描述: 雙路LDO穩(wěn)壓器兼容低ESR第
文件頁數(shù): 7/19頁
文件大小: 245K
代理商: XC6401GG50DMR
XC6401 Series
Dual LDO Regulators, Low ESR Cap. Compatible
Preliminary
!
TEST CIRCUITS
Circuit
1
EN1/EN2 :
Active 'High' = EN=VIN
Active 'Low' = EN=VSS
Circuit
2
EN1/EN2 :
1.
Active 'High' (Pull-down resistor built-in)
VR1 Supply Current ISS1=I1 (Note:EN1=ON, EN2=OFF)
VR2 Supply Current ISS2=I1 (Note:EN1=OFF, EN2=ON)
2.
Active 'High' (Pull-down, no resistor built-in)
VR1 Supply Current ISS1=I1 (Note:EN1=ON, EN2=OFF)
VR2 Supply Current ISS2=I1 (Note:EN1=OFF, EN2=ON)
3.
Active 'Low' (Pull-up resistor built-in)
VR1 Supply Current ISS1=I1+I2 (Note:EN1=ON, EN2=OFF)
VR2 Supply Current ISS2=I1+I3 (Note:EN1=OFF, EN2=ON)
4.
Active 'Low' (Pull-up, no resistor built-in)
VR1 Supply Current ISS1=I1 (Note:EN1=ON, EN2=OFF)
VR2 Supply Current ISS2=I1 (Note:EN1=OFF, EN2=ON)
Circuit
3
EN1/EN2 :
Active 'High' = EN=VSS
Active 'Low' = EN=VIN
V
I
OUT2
CIN, CL1, CL2 : 1
μ
F(ceramic)
CL2
CL1
V
I
OUT1
CIN
V
IN
V
OUT1
V
OUT2
EN1
V
SS
EN2
RL1
V
RL2
A
A
A
A
A
V
IN
I
OUT1
I
OUT2
V
IN
V
OUT1
V
OUT2
EN1
V
SS
EN2
A
A
I
3
I
2
I
1
CL2
CL1, CL2 :1
μ
F(ceramic)
CL1
A
V
IN
V
IN
V
OUT1
V
OUT2
EN1
V
SS
EN2
Semiconductor Ltd.
Data Sheet
7
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