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參數資料
| 型號： | XC6402 |
| 廠商： | TOREX SEMICONDUCTOR LTD. |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | High Current, High Speed LDO Regulators, Voltage Detector Function |
| 中文描述： | 高電流，高速LDO穩(wěn)壓器，電壓檢測功能 |
| 文件頁數： | 15/16頁 |
| 文件大?。?/td> | 134K |
| 代理商： | XC6402 |
XC6402 Series
High Current, High Speed LDO Regulators, Voltage Detector Function
!
OPERATIONAL EXPLANATION
<Output voltage regulator control>
The voltage, divided by resistors R1 & R2 which are connected to the VROUT pin is compared with the internal reference voltage by the error amplifier. The
P-Channel MOSFET, which is connected to the VROUT pin, is then driven by the subsequent output signal. The output voltage at the VROUT pin is controlled
& stabilized by negative feedback. The
current limit circuit and short circuit protection operate in relation to the level of output current. Further, the voltage regulator's internal circuitry can be shutdown
via the EN pin's signal.
<Detector function with the XC6402 series>
The series' detector function monitors the voltage divided by resistors R3 & R4 which are connected to the VROUT pin or the VIN pin, as well as monitoring the
voltage of the internal reference voltage source via the comparator. The VDSEN pin has options (please refer to the Selection Guide, item 2 on page 2). A
'High' or 'Low' signal level can be output from the VDOUT pin when the VD pin voltage level goes below the detect voltage. The VD output logic has options
(please refer to the Selection Guide, item 3 on page 2). As VDOUT is an open-drain N-channel output, a pull-up resistor of about 220K
is needed to achieve
a voltage output. Because of hysteresis at the detector function, output at the VDOUT pin will invert when the detect voltage level increases above the release
voltage (105% of the detect voltage).
For the XC6402C type, in stand-by, if a voltage of the recovery voltage is present at the VROUT pin (from another power source), the VDOUT pin will be high
impedance mode, and the pull up voltage will be output at VDOUT. By connecting the Cdelay pin to a capacitor (Cd), the XC6402F series can apply a delay
time to VDOUT voltage when releasing voltage. The delay time can be calculated from the internal resistance, Rdelay (2M
TYP. fixed) and the value of Cd as
per the following equation.
Delay Time
Rdelay standard : 1.0 ~ 3.5M
TYP : 2.0M
<Low ESR Capacitors>
With the XC6402 series regulator, a stable output voltage is achievable even if low ESR capacitors are used, as a phase compensation circuit is built-in to the
regulator. In order to ensure the effectiveness of the phase compensation, we suggest that an output capacitor (CL) be connected as close as possible,
between the output pin (VROUT) and the VSS pin. Please use an output capacitor (CL) with a capacitance, based on the chart below. We also suggest an
input capacitor (CIN) of 1
μ
F : this should be connected between VIN and VSS in order to stabilize input power source.
Output Capacitor Corresponding Chart
<Current Limiter, Short-Circuit Protection>
The XC6402 series regulator offers a combination of current limit and circuit protection by means of a built-in fixed current limiter circuit and a foldback
circuit. When the load current reaches the current limit level, the fixed current limiter circuit operates and output voltage drops. As a result of this drop in
output voltage, the foldback circuit operates, the output voltage drops further and output current decreases. When the output pin is shorted, a current of
about 30mA flows.
0.8 ~1.45V
6.8
μ
F
1.5 ~ 1.75V
2.2
μ
F
1.8V ~ 5.0V
1.0
μ
F
Delay Time = Cdelay x Rdelay x 0.7
CL
VR OUTPUT VOLTAGE
0.47
μ
F
658 msec
329.0 ~ 1151.5 msec
1
μ
F
1400 msec
700.0 ~ 2450.0 msec
0.1
μ
F
140 msec
70.0 ~ 245.0 msec
0.22
μ
F
308 msec
154.0 ~ 539.0 msec
0.022
μ
F
30.8 msec
15.4 ~ 53.9 msec
0.047
μ
F
65.8 msec
32.9 ~ 115.15 msec
Cdelay
DELAY TIME (TYP.)
DELAY TIME (TYP.)
0.01
μ
F
14 msec
7.0 ~ 24.5 msec
Semiconductor Ltd.
Data Sheet
15
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相關代理商/技術參數 |
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