參數(shù)資料
型號： XC6VCX130T-2FFG1156I
廠商： Xilinx Inc
文件頁數(shù)： 47/52頁
文件大小： 0K
描述： IC FPGA VIRTEX 6 128K 1156FFGBGA
產(chǎn)品培訓(xùn)模塊： Virtex-6 FPGA Overview
產(chǎn)品變化通告： Virtex-6 FIFO Input Logic Reset 18/Apr/2011
標準包裝： 1
系列： Virtex® 6 CXT
LAB/CLB數(shù)： 10000
邏輯元件/單元數(shù)： 128000
RAM 位總計： 9732096
輸入/輸出數(shù)： 600
電源電壓： 0.95 V ~ 1.05 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 1156-BBGA，F(xiàn)CBGA
供應(yīng)商設(shè)備封裝： 1156-FCBGA（35x35）
Virtex-6 CXT Family Data Sheet
DS153 (v1.6) February 11, 2011
Product Specification
51
06/08/10
1.2
Added VFS and revised the VIN and VTS values in Table 9, page 11.
Added VFS and note 6 to Table 10. Revised description of CIN in Table 11, including adding note 3.
Updated Table 13 including adding note 2.
Removed DIFF SSTL15 and added values to SSTL15 in Table 15.
Updated Table 16 through Table 19.
Added eFUSE Read Endurance section.
Updated entire GTX Transceivers in CXT Devices section.
Changed specifications of PCI Express in Table 34.
In Table 35, removed RLDRAM II and revised and added values to other interface performance
specifications.
Updated speed specification to v1.04 with appropriate changes to Table 36.
Revised the IOB switching characteristics in Table 38.
Updated values in Table 39 and note 4 in Table 41.
ILOGIC (Table 42), OLOGIC (Table 43), ISERDES (Table 44), and OSERDES (Table 45) switching
characteristics changes.
Revised TIODELAY_CLK_MAX and TIDELAYPAT_JIT in Table 46.
Revised CLB switching characteristics and added TSHCKO to Table 47and revised CLB switching
characteristics in Table 48 and Table 49.
In Table 50, removed TRCKO_RDCOUNT and TRCKO_WRCOUNT, removed TRCKO_PARITY_ECC: Clock CLK
to ECCPARITY in standard ECC mode, revised TRDCK_DI_ECC/TRCKD_DI_ECC, TRCKO_POINTERS, and
revised FMAX and FMAX_CASCADE switching characteristics.
Multiple changes to configuration specifications in Table 52.
Revised switching characteristics and global clock tree (BUFG) FMAX in Table 53.
Revised switching characteristics and I/O clock tree (BUFIO) FMAX in Table 54.
Added note 1 to Table 55.
Revised the FMAX horizontal clock tree (BUFH) in Table 56.
Multiple changes to MMCM specifications in Table 57 including FINMAX and FOUTMAX.
Updated switching characteristics in Table 58 through Table 63.
Removed TDCD_BUFH and TBUFHSKEW from Table 64.
06/30/10
1.3
Production release of XC6VCX130T and XC6VCX240T in Table 36 and Table 37. Updated -1 speed
grade SDR values in Table 35. Updated BUFIO FMAX specification in Table 54. Added Note 6 to
07/28/10
1.4
Production release of XC6VCX75T and XC6VCX195T in Table 36 and Table 37 using ISE 12.2
software with speed file v1.06 using the Speed File Patch. Updated PCI compliance on page 1. Added
values to Table 13. In Table 25, update VCMOUTDC equation to MGTAVTT – DVPPOUT/4. Updated FMAX
in Table 53, Table 54, and Table 56. Updated FINMAX and FOUTMAX in Table 57. Updated values in
10/14/10
1.5
Moved data sheet to Production status on the first page. Updated speed file with ISE 12.3 software with
speed file v1.08 using the Speed File Patch. In Table 51, updated values for TDSPCKO_{PCOUT,
02/11/11
1.6
Updated Table 10 to include the industrial range specifications. Added Note 12 to Table 50. Revised
TBPICCO values in Table 52. Updated range description for FINDUTY in Table 57 and added note 8.
The following revisions are due to specification changes as described in XCN11009, Virtex-6 FPGA:
Data Sheet, User Guides, and JTAG ID Updates.
In Table 52, updated the values for TSMCCKW, TSPIDCC, TSPICCM, and TSPICCFC. In Table 57: MMCM
Specification, added bandwidth settings to FPFDMIN and added note 1.
Date
Version
Description of Revisions
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XC6VCX130T-2FFG484C 功能描述:IC FPGA VIRTEX 6 128K 484FFGBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex® 6 CXT 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標準包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計:4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XC6VCX130T-2FFG484I 功能描述:IC FPGA VIRTEX 6 128K 484FFGBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex® 6 CXT 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標準包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計:4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XC6VCX130T-2FFG784C 功能描述:IC FPGA VIRTEX 6 128K 784FFGBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex® 6 CXT 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標準包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計:4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XC6VCX130T-2FFG784I 功能描述:IC FPGA VIRTEX 6 128K 784FFGBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:Virtex® 6 CXT 產(chǎn)品變化通告:Step Intro and Pkg Change 11/March/2008 標準包裝:1 系列:Virtex®-5 SXT LAB/CLB數(shù):4080 邏輯元件/單元數(shù):52224 RAM 位總計:4866048 輸入/輸出數(shù):480 門數(shù):- 電源電壓:0.95 V ~ 1.05 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:1136-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XC6VCX195T 制造商:XILINX 制造商全稱:XILINX 功能描述:Virtex-6 CXT Family Data Sheet
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