參數(shù)資料
型號: XC7K420T-2FFG901C
廠商: XILINX INC
元件分類: FPGA
英文描述: FPGA, PBGA900
封裝: LEAD FREE, FBGA-900
文件頁數(shù): 48/50頁
文件大?。?/td> 1218K
代理商: XC7K420T-2FFG901C
Kintex-7 FPGAs Data Sheet: DC and Switching Characteristics
DS182 (v1.1) April 1, 2011
Advance Product Specification
7
GTX Transceiver Specifications
GTX Transceiver DC Characteristics
GTX Transceiver DC Input and Output Levels
Table 13 summarizes the DC output specifications of the GTX transceivers in Kintex-7 FPGAs. Consult UG476: 7Series
FPGAs GTX Transceiver User Guide for further details.
Table 12: Recommended Operating Conditions for GTX Transceivers (1)(2)
Symbol
Description
Min
Typ
Max
Units
MGTAVCC
Analog supply voltage for the GTX transmitter and receiver circuits relative to
GND
0.97
1.0
1.03
V
MGTAVTT
Analog supply voltage for the GTX transmitter and receiver termination circuits
relative to GND
1.17
1.2
1.23
V
MGTAVTTRCAL
Analog supply voltage for the resistor calibration circuit of the GTX transceiver
column
1.17
1.2
1.23
V
MGTVCCAUX
Auxiliary analog Quad PLL (QPLL) voltage supply for the transceivers
1.75
1.80
1.85
V
Notes:
1.
Each voltage listed requires the filter circuit described in UG476: 7 Series FPGAs GTX Transceiver User Guide.
2.
Voltages are specified for the temperature range of Tj = 0°C to +85°C.
Table 13: GTX Transceiver DC Specifications
Symbol
DC Parameter
Conditions
Min
Typ
Max
Units
DVPPIN
Differential peak-to-peak input
voltage
External AC coupled
2000
mV
VIN
Absolute input voltage
DC coupled
MGTAVTT = 1.2V
–400
MGTAVTT
mV
VCMIN
Common mode input voltage
DC coupled
MGTAVTT = 1.2V
2/3 MGTAVTT
mV
DVPPOUT
Differential peak-to-peak output
voltage(1)
Transmitter output swing is set to
maximum setting
1000
mV
VCMOUTDC
DC common mode output
voltage.
Equation based
MGTAVTT – DVPPOUT/4
mV
RIN
Differential input resistance
100
ROUT
Differential output resistance
100
TOSKEW
Transmitter output pair (TXP and TXN) intra-pair skew
10
ps
CEXT
Recommended external AC coupling capacitor(2)
100
nF
Notes:
1.
The output swing and preemphasis levels are programmable using the attributes discussed in UG476: 7 Series FPGAs GTX Transceiver
User Guide and can result in values lower than reported in this table.
2.
Other values can be used as appropriate to conform to specific protocols and standards.
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