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參數(shù)資料
| 型號(hào)： | XC95288XL-10TQ144I |
| 廠商： | Xilinx Inc |
| 文件頁數(shù)： | 9/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | HP CPLD TQ FLAT 144 IND TMP P/P |
| 標(biāo)準(zhǔn)包裝： | 60 |
| 系列： | XC9500XL |
| 可編程類型： | 系統(tǒng)內(nèi)可編程（最少 10,000 次編程/擦除循環(huán)） |
| 最大延遲時(shí)間 tpd(1)： | 10.0ns |
| 電壓電源 - 內(nèi)部： | 3 V ~ 3.6 V |
| 邏輯元件/邏輯塊數(shù)目： | 16 |
| 宏單元數(shù)： | 288 |
| 門數(shù)： | 6400 |
| 輸入/輸出數(shù)： | 117 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-LQFP |
| 供應(yīng)商設(shè)備封裝： | 144-TQFP（20x20） |
| 包裝： | 托盤 |
| 其它名稱： | 155632 Q1155632 XC95288XL10TQ144I |
XC95288XL High Performance CPLD
4
DS055 (v2.1 April 3, 2007
1-800-255-7778
Product Specification
R
Absolute Maximum Ratings(2)
Recommended Operation Conditions
Quality and Reliability Characteristics
DC Characteristic Over Recommended Operating Conditions
Symbol
Description
Value
Units
VCC
Supply voltage relative to GND
–0.5 to 4.0
V
VIN
Input voltage relative to GND(1)
–0.5 to 5.5
V
VTS
Voltage applied to 3-state output(1)
–0.5 to 5.5
V
TSTG
Storage temperature (ambient)(3)
–65 to +150
oC
TJ
Junction temperature
+150
oC
Notes:
1.
Maximum DC undershoot below GND must be limited to either 0.5V or 10 mA, whichever is easier to achieve. During transitions, the
device pins may undershoot to –2.0V or overshoot to +7.0V, provided this over- or undershoot lasts less than 10 ns and with the
forcing current being limited to 200 mA. External I/O voltage may not exceed VCCINT by 4.0V.
2.
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions
is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect device reliability.
3.
For soldering guidelines and thermal considerations, see the Device Packaging information on the Xilinx website. For Pb-free
packages, see XAPP427.
Symbol
Parameter
Min
Max
Units
VCCINT
Supply voltage for internal logic
and input buffers
Commercial TA = 0oC to 70oC3.0
3.6
V
Industrial TA = –40oC to +85oC3.0
3.6
V
VCCIO
Supply voltage for output drivers for 3.3V operation
3.0
3.6
V
Supply voltage for output drivers for 2.5V operation
2.3
2.7
V
VIL
Low-level input voltage
0
0.80
V
VIH
High-level input voltage
2.0
5.5
V
VO
Output voltage
0
VCCIO
V
Symbol
Parameter
Min
Max
Units
TDR
Data Retention
20
-
Years
NPE
Program/Erase Cycles (Endurance)
10,000
-
Cycles
VESD
Electrostatic Discharge (ESD)
2,000
-
Volts
Symbol
Parameter
Test Conditions
Min
Max
Units
VOH
Output high voltage for 3.3V outputs
IOH = –4.0 mA
2.4
-
V
Output high voltage for 2.5V outputs
IOH = –500 μA90% VCCIO
-V
VOL
Output low voltage for 3.3V outputs
IOL = 8.0 mA
-
0.4
V
Output low voltage for 2.5V outputs
IOL = 500 μA-
0.4
V
IIL
Input leakage current
VCC = Max; VIN = GND or VCC
-±10
μA
IIH
I/O high-Z leakage current
VCC = Max; VIN = GND or VCC
-±10
μA
IIH
I/O high-Z leakage current
VCC = Max; VCCIO = Max;
VIN = GND or 3.6V
-±10
μA
VCC Min < VIN < 5.5V
-
±50
μA
CIN
I/O capacitance
VIN = GND; f = 1.0 MHz
-
10
pF
ICC
Operating supply current
(low power mode, active)
VIN = GND, No load; f = 1.0 MHz
85 (Typical)
mA
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