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參數資料
| 型號： | XCS05-3PC280I |
| 廠商： | Xilinx, Inc. |
| 英文描述： | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| 中文描述： | 斯巴達和Spartan - xL的家庭現場可編程門陣列 |
| 文件頁數： | 55/66頁 |
| 文件大?。?/td> | 809K |
| 代理商： | XCS05-3PC280I |
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DS060 (v1.5) March 2, 2000
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4-55
Spartan and Spartan-XL Families Field Programmable Gate Arrays
Device-Specific Pinout Tables
Device-specific tables include all packages for each Spartan and Spartan-XL device. They follow the pad locations around
the die, and include boundary scan register locations.
XCS05 & XCS05XL Device Pinouts
DOUT
O
I/O
During Slave Serial or Master Serial configuration, DOUT is the serial configuration data
output that can drive the DIN of daisy-chained slave FPGAs. DOUT data changes on
the falling edge of CCLK, one-and-a-half CCLK periods after it was received at the DIN
input.
In Spartan-XL Express mode, DOUT is the status output that can drive the CS1 of dai-
sy-chained FPGAs, to enable and disable downstream devices.
After configuration, DOUT is a user-programmable I/O pin.
Unrestricted User-Programmable I/O Pins
These pins can be configured to be input and/or output after configuration is completed.
Before configuration is completed, these pins have an internal high-value pull-up resis-
tor network that defines the logic level as High.
I/O
Weak
Pull-up
I/O
Table 18: Pin Descriptions (Continued)
Pin Name
I/O
During
Config.
I/O
After
Config.
Pin Description
XCS05/XL
Pad Name
PC84
VQ100
Bndry Scan
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O, SGCK1
, GCK8
VCC
GND
I/O, PGCK1
, GCK1
I/O
I/O, TDI
I/O, TCK
I/O, TMS
I/O
I/O
I/O
I/O
GND
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O, SGCK2
, GCK2
Not Connected
, M1
GND
MODE
, M0
VCC
Not Connected
,
PWRDWN
I/O, PGCK2
, GCK3
I/O (HDC)
P2
P3
P4
-
-
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
-
P19
P20
P21
P22
P23
P24
-
P25
P26
P27
-
P28
P29
P30
P31
P32
P33
P34
P89
P90
P91
P92
P93
P94
P95
P96
P97
P98
P99
P100
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P26
-
32
35
38
41
44
47
50
53
56
59
-
-
62
65
68
71
74
77
83
86
89
-
-
92
95
98
104
107
110
113
116
119
122
-
125
-
126
P35
P36
P27
P28
127
130
I/O
I/O (LDC)
I/O
I/O
I/O
I/O
I/O
I/O (INIT)
VCC
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O, SGCK3
, GCK4
GND
DONE
VCC
PROGRAM
I/O (D7
)
I/O, PGCK3
, GCK5
I/O (D6
)
I/O
I/O (D5
)
I/O
I/O
I/O
I/O (D4
)
I/O
VCC
GND
I/O (D3
)
I/O
I/O
I/O (D2
)
I/O
-
P29
P30
P31
P32
P33
P34
P35
P36
P37
P38
P39
P40
P41
P42
P43
P44
P45
P46
P47
P48
P49
P50
P51
P52
P53
P54
P55
P56
P57
P58
P59
P60
P61
P62
P63
P64
P65
P66
P67
P68
P69
133
136
139
142
145
148
151
154
-
-
157
160
163
166
169
172
175
178
181
184
-
-
-
-
187
190
193
196
199
202
205
208
211
214
-
-
217
220
223
229
232
P37
P38
P39
-
-
P40
P41
P42
P43
P44
P45
-
-
P46
P47
P48
P49
P50
P51
P52
P53
P54
P55
P56
P57
P58
-
P59
P60
-
-
P61
P62
P63
P64
P65
P66
-
P67
P68
XCS05/XL
Pad Name
PC84
VQ100
Bndry Scan
相關PDF資料 |
PDF描述 |
|---|---|
| XCS05-3PC84C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS05-3PC84I | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS05-3PQ144C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS05-3PQ144I | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS05-3PQ208C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
相關代理商/技術參數 |
參數描述 |
|---|---|
| XCS05-3PC84 | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS05-3PC84C | 功能描述:IC FPGA 5V C-TEMP 84-PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現場可編程門陣列） 系列:Spartan® 標準包裝:1 系列:Kintex-7 LAB/CLB數:25475 邏輯元件/單元數:326080 RAM 位總計:16404480 輸入/輸出數:350 門數:- 電源電壓:0.97 V ~ 1.03 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:900-BBGA，FCBGA 供應商設備封裝:900-FCBGA（31x31） 其它名稱:122-1789 |
| XCS05-3PC84I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS05-3PQ100C | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS05-3PQ100I | 制造商:XILINX 制造商全稱:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
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